[VectorCombine] foldSelectShuffle - early-out cases where the max vector register width isn't large enough

[RKSimon]

Technically this could happen with vector units that can't handle all legal scalar widths - but its good enough to use a generic crash test without a suitable target

Fixes #157335

[llvmbot]

@llvm/pr-subscribers-vectorizers

@llvm/pr-subscribers-llvm-transforms

Author: Simon Pilgrim (RKSimon)

Changes

Technically this could happen with vector units that can't handle all legal scalar widths - but good enough to use a generic crash test without a suitable target

Fixes #157335

---

Full diff: https://github.com/llvm/llvm-project/pull/157430.diff

2 Files Affected:

• (modified) llvm/lib/Transforms/Vectorize/VectorCombine.cpp (+2)
• (added) llvm/test/Transforms/VectorCombine/pr157335.ll (+11)

diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index 7a0b7ad57a493..9dd1532d1b230 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -3903,6 +3903,8 @@ bool VectorCombine::foldSelectShuffle(Instruction &I, bool FromReduction) {
   unsigned MaxVectorSize =
       TTI.getRegisterBitWidth(TargetTransformInfo::RGK_FixedWidthVector);
   unsigned MaxElementsInVector = MaxVectorSize / ElementSize;
+  if (MaxElementsInVector == 0)
+    return false;
   // When there are multiple shufflevector operations on the same input,
   // especially when the vector length is larger than the register size,
   // identical shuffle patterns may occur across different groups of elements.
diff --git a/llvm/test/Transforms/VectorCombine/pr157335.ll b/llvm/test/Transforms/VectorCombine/pr157335.ll
new file mode 100644
index 0000000000000..e942a996d016f
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/pr157335.ll
@@ -0,0 +1,11 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=vector-combine -S %s | FileCheck %s
+
+define <2 x double> @PR157335() {
+  %v0 = fmul <2 x double> zeroinitializer, zeroinitializer
+  %v1 = fmul <2 x double> zeroinitializer, zeroinitializer
+  %v2 = fsub <2 x double> %v0, %v1
+  %v3 = fadd <2 x double> %v0, %v1
+  %v4 = shufflevector <2 x double> %v2, <2 x double> %v3, <2 x i32> <i32 0, i32 3>
+  ret <2 x double> %v4
+}
\ No newline at end of file