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[CIR][CIRGen][Builtin][X86] Compress Store Intrinsics #169648

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[CIR][CIRGen][Builtin][X86] Compress Store Intrinsics #169648

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16 changes: 15 additions & 1 deletion clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,14 @@ static mlir::Value getMaskVecValue(CIRGenFunction &cgf, const CallExpr *expr,
return maskVec;
}

static mlir::Value emitX86CompressStore(CIRGenFunction &cgf, const CallExpr *expr, ArrayRef<mlir::Value> ops){
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@andykaylor andykaylor Dec 1, 2025

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Suggested change
static mlir::Value emitX86CompressStore(CIRGenFunction &cgf, const CallExpr *expr, ArrayRef<mlir::Value> ops){
static mlir::Value emitX86CompressStore(CIRGenBuilderTy &builder, mlir::Location loc, ArrayRef<mlir::Value> ops){

The signature of emitIntrinsicCallOp has recently been updated. This change makes the function you are adding consistent with it.

auto ResultTy = cast<cir::VectorType>(ops[1].getType());
mlir::Value MaskValue = getMaskVecValue(cgf, expr, ops[2], cast<cir::VectorType>(ResultTy).getSize());
mlir::Value ptr = ops[0];

return emitIntrinsicCallOp(cgf, expr, "masked_compressstore", ResultTy, llvm::SmallVector<mlir::Value, 3>{ops[1], ptr, MaskValue});
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@andykaylor andykaylor Dec 1, 2025

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Suggested change
return emitIntrinsicCallOp(cgf, expr, "masked_compressstore", ResultTy, llvm::SmallVector<mlir::Value, 3>{ops[1], ptr, MaskValue});
return emitIntrinsicCallOp(builder, loc, "masked_compressstore", ResultTy, mlir::ValueRange{ops[1], ptr, MaskValue});


}
mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
const CallExpr *expr) {
if (builtinID == Builtin::BI__builtin_cpu_is) {
Expand Down Expand Up @@ -400,7 +408,12 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
case X86::BI__builtin_ia32_expandloadhi512_mask:
case X86::BI__builtin_ia32_expandloadqi128_mask:
case X86::BI__builtin_ia32_expandloadqi256_mask:
case X86::BI__builtin_ia32_expandloadqi512_mask:
case X86::BI__builtin_ia32_expandloadqi512_mask:{
cgm.errorNYI(expr->getSourceRange(),
std::string("unimplemented X86 builtin call: ") +
getContext().BuiltinInfo.getName(builtinID));
return {};
}
case X86::BI__builtin_ia32_compressstoredf128_mask:
case X86::BI__builtin_ia32_compressstoredf256_mask:
case X86::BI__builtin_ia32_compressstoredf512_mask:
Expand All @@ -419,6 +432,7 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
case X86::BI__builtin_ia32_compressstoreqi128_mask:
case X86::BI__builtin_ia32_compressstoreqi256_mask:
case X86::BI__builtin_ia32_compressstoreqi512_mask:
return emitX86CompressStore(*this, expr, ops);
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@andykaylor andykaylor Dec 1, 2025

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Suggested change
return emitX86CompressStore(*this, expr, ops);
return emitX86CompressStore(builder, getLoc(expr->getExprLoc()), ops);

case X86::BI__builtin_ia32_expanddf128_mask:
case X86::BI__builtin_ia32_expanddf256_mask:
case X86::BI__builtin_ia32_expanddf512_mask:
Expand Down
5 changes: 5 additions & 0 deletions clang/test/CIR/CodeGen/X86/compressStore_builtin.c
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
#include <immintrin.h>
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@andykaylor andykaylor Dec 1, 2025

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This test should be moved to clang/test/CIR/CodeGenBuiltins/X86/avx512vl-builtins.c which is also being added in #169582. The test will need RUN lines and CIR, LLVM, and OGCG checks added.


void test_compress_store(void *__P, __mmask8 __U, __m128d __A){
return _mm_mask_compressstoreu_pd (__P, __U, __A);
}
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