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[AArch64] Mark Armv8.4-a LDAPUR* instructions as mayLoad #171142
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| Original file line number | Diff line number | Diff line change |
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@@ -14,11 +14,11 @@ | |
| # CHECK-NEXT: 2 1 0.50 * ldapur x20, [x13] | ||
| # CHECK-NEXT: 2 1 0.50 * ldapurb w13, [x17] | ||
| # CHECK-NEXT: 2 1 0.50 * ldapurh w3, [x22] | ||
| # CHECK-NEXT: 2 1 0.50 U ldapursb w7, [x8] | ||
| # CHECK-NEXT: 2 1 0.50 U ldapursb x29, [x7] | ||
| # CHECK-NEXT: 2 1 0.50 U ldapursh w17, [x19] | ||
| # CHECK-NEXT: 2 1 0.50 U ldapursh x3, [x3] | ||
| # CHECK-NEXT: 2 1 0.50 U ldapursw x3, [x18] | ||
| # CHECK-NEXT: 2 1 0.50 * U ldapursb w7, [x8] | ||
| # CHECK-NEXT: 2 1 0.50 * U ldapursb x29, [x7] | ||
| # CHECK-NEXT: 2 1 0.50 * U ldapursh w17, [x19] | ||
| # CHECK-NEXT: 2 1 0.50 * U ldapursh x3, [x3] | ||
| # CHECK-NEXT: 2 1 0.50 * U ldapursw x3, [x18] | ||
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Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I'm surprised these are still marked as 'has side effects'. Could you explain what the side effects are?
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. yeah tbh im not sure about that either, i can't see why they shouldn't be marked as mayLoad so I suspect that was just an oversight, but I didnt add these instructions
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. The context is that I spotted that Apple clang thinks these instructions may load and do not have side effects and I wanted to understand which implementation is correct (if either) and fix accordingly
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I'm not familiar with the semantics of these instructions, but from a quick glance at https://developer.arm.com/documentation/102336/0100/Load-Acquire-and-Store-Release-instructions it looks like they have implicit barrier semantics, so while I can't give a definitive answer I would err more towards them having side-effects than not.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Interesting, thanks! |
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| # CHECK-NEXT: 2 1 0.50 * stlur w3, [x27] | ||
| # CHECK-NEXT: 2 1 0.50 * stlur x23, [x25] | ||
| # CHECK-NEXT: 2 1 0.50 * stlurb w30, [x17] | ||
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This should probably be WriteLD or WriteAtomic. The scheduling info in the tests looks incorrect.
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Good spot! I can post a separate PR.
FWIW I've not been paying close attention to the scheduling info with recent patches tbh, just trying to refactor the tests and increase coverage but i can believe there's many with bad info such as this.
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posted a fix for this #171637