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[X86] LowerATOMIC_STORE - on 32-bit targets see if i64 values were originally legal f64 values that we can store directly. #171602

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Merged
RKSimon merged 2 commits into from
Dec 11, 2025
Merged

[X86] LowerATOMIC_STORE - on 32-bit targets see if i64 values were originally legal f64 values that we can store directly. #171602

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[X86] LowerATOMIC_STORE - on 32-bit targets see if i64 values were or…
RKSimon Dec 10, 2025
eb092a7
Merge branch 'main' into x86-atomic-store-i64-f64
RKSimon Dec 11, 2025
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9 changes: 8 additions & 1 deletion llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -33171,7 +33171,14 @@ static SDValue LowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG,
// For illegal i64 atomic_stores, we can try to use MOVQ or MOVLPS if SSE
// is enabled.
if (VT == MVT::i64) {
if (Subtarget.hasSSE1()) {
SDValue BCValue = peekThroughBitcasts(Node->getVal());
if (BCValue.getValueType() == MVT::f64 &&
(Subtarget.hasX87() || Subtarget.hasSSE2())) {
// If the i64 was bitcast from a f64 then we can do the f64 atomic store
// directly with FSTPL/MOVSD.
Chain = DAG.getStore(Node->getChain(), dl, BCValue, Node->getBasePtr(),
Node->getMemOperand());
} else if (Subtarget.hasSSE1()) {
SDValue SclToVec =
DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Node->getVal());
MVT StVT = Subtarget.hasSSE2() ? MVT::v2i64 : MVT::v4f32;
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