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@mtvec mtvec commented Sep 26, 2023

Implement the following relocations used by the medlow code model and non-PIE binaries:

  • R_RISCV_HI20
  • R_RISCV_LO12_I
  • R_RISCV_LO12_S

Implement the following relocations used by the medlow code model and
non-PIE binaries:
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
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LGTM

@mtvec mtvec merged commit 9555736 into llvm:main Sep 26, 2023
Guzhu-AMD pushed a commit to GPUOpen-Drivers/llvm-project that referenced this pull request Sep 28, 2023
Local branch amd-gfx 7c67572 Merged main:f9149a34d9b4 into amd-gfx:0bf8d84ecbde
Remote branch main 9555736 [BOLT][RISCV] Implement LO/HI relocations (llvm#67444)
legrosbuffle pushed a commit to legrosbuffle/llvm-project that referenced this pull request Sep 29, 2023
Implement the following relocations used by the medlow code model and
non-PIE binaries:
- R_RISCV_HI20
- R_RISCV_LO12_I
- R_RISCV_LO12_S
@mtvec mtvec deleted the bolt-riscv-reloc-lohi branch October 10, 2023 09:38
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2 participants