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5 changes: 4 additions & 1 deletion llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2978,7 +2978,10 @@ bool AArch64InstrInfo::canFoldIntoAddrMode(const MachineInstr &MemI,

// Don't fold the add if the result would be slower, unless optimising for
// size.
int64_t Shift = AddrI.getOperand(3).getImm();
unsigned Shift = static_cast<unsigned>(AddrI.getOperand(3).getImm());
if (AArch64_AM::getShiftType(Shift) != AArch64_AM::ShiftExtendType::LSL)
return false;
Shift = AArch64_AM::getShiftValue(Shift);
if (!OptSize) {
if ((Shift != 2 && Shift != 3) || !Subtarget.hasAddrLSLFast())
return false;
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc -global-isel --aarch64-enable-sink-fold=true < %s | FileCheck %s

target triple = "aarch64-linux"

; Test a non-LSL shift cannot be folded into the addressing mode.
define void @f(ptr %p, i64 %i) optsize {
; CHECK-LABEL: f:
; CHECK: // %bb.0:
; CHECK-NEXT: add x8, x0, x1, asr #32
; CHECK-NEXT: strb wzr, [x8]
; CHECK-NEXT: ret
%d = ashr i64 %i, 32
%a = getelementptr i8, ptr %p, i64 %d
store i8 0, ptr %a
ret void
}