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22 changes: 14 additions & 8 deletions llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3115,14 +3115,20 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
}

// For performance reasons restore SVE register in increasing order
auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
auto PPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsPPR);
auto PPREnd = std::find_if(RegPairs.rbegin(), RegPairs.rend(), IsPPR);
std::reverse(PPRBegin, PPREnd.base());
auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
auto ZPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsZPR);
auto ZPREnd = std::find_if(RegPairs.rbegin(), RegPairs.rend(), IsZPR);
std::reverse(ZPRBegin, ZPREnd.base());
if (RegPairs.size() > 1) {
auto IsPPR = [](const RegPairInfo &c) {
return c.Type == RegPairInfo::PPR;
};
auto PPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsPPR);
auto PPREnd = std::find_if(RegPairs.rbegin(), RegPairs.rend(), IsPPR);
std::reverse(PPRBegin, PPREnd.base());
auto IsZPR = [](const RegPairInfo &c) {
return c.Type == RegPairInfo::ZPR;
};
auto ZPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsZPR);
auto ZPREnd = std::find_if(RegPairs.rbegin(), RegPairs.rend(), IsZPR);
std::reverse(ZPRBegin, ZPREnd.base());
}

for (const RegPairInfo &RPI : RegPairs) {
unsigned Reg1 = RPI.Reg1;
Expand Down