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[mlir][LinAlg] Vectorize reverse-like ops using vector.gather ops. #83205

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Feb 28, 2024
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[mlir][LinAlg] Vectorize reverse-like ops using vector.gather ops. #83205

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3 changes: 1 addition & 2 deletions mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -891,8 +891,7 @@ static bool isContiguousLoadIdx(LinalgOp &linalgOp, Value &val,

// Conservatively reject Ops that could lead to indices with stride other
// than 1.
if (!isa<arith::AddIOp, arith::SubIOp, arith::ConstantOp, linalg::IndexOp>(
ancestor))
if (!isa<arith::AddIOp, arith::ConstantOp, linalg::IndexOp>(ancestor))
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@dcaballe dcaballe Feb 27, 2024

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Instead of removing the sub operation we may want to check that the sub is of the form index - loop_invariant. This should ensure that the index is monotonically increasing.

Additionally, we may want this function to return not only true or false but also if the index is an increasing or decreasing contiguous index. Then, the case sub loop_invariant - index should return a decreasing index and we can generate a gather for that case for now. That should leave the code ready to easily generate the proper transfer read.

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@dcaballe dcaballe Feb 28, 2024

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Also wondering... shouldn't the condition below be a &= instead of an or?

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@hanhanW hanhanW Feb 28, 2024

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yeah, totally agree with what you said. Checking that the sub is of the form index - loop_invariant is also the thing in my mind, but I think @banach-space should weigh in, while he's OOO this week. I have few questions too:

  1. Why do we add sub op to the list while there are no other tests about it.
  2. I'm also wondering why the condition below be a &=.

Can we land this as what it is for now to unblock correctness issue, and follow-up on this after Andrzej is back?

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@banach-space banach-space Feb 28, 2024

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+1 to landing this as is

Both issues that you mention look like my oversight, sorry for that.

There’s quite a few cases for tensor.extract and I struggled to come up with good tests to cover all of them.

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@hanhanW hanhanW Feb 28, 2024

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SGTM, if one of you approve the PR, I'll land it. Thanks!

return false;

bool result = false;
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45 changes: 45 additions & 0 deletions mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
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Expand Up @@ -550,3 +550,48 @@ module attributes {transform.with_named_sequence} {
transform.yield
}
}

// -----

#map = affine_map<(d0, d1, d2) -> (d0, d1, d2)>
#map1 = affine_map<(d0, d1, d2) -> (d0 + d1 + d2)>
func.func @vectorize_reverse_like_tensor_extract(%arg0: tensor<1x2x3xf32>, %arg1: tensor<1x1x3xf32>, %arg2: index) -> tensor<1x1x3xf32> {
%c1 = arith.constant 1 : index
%c0 = arith.constant 0 : index
%c2 = arith.constant 2 : index
%0 = linalg.generic {indexing_maps = [#map], iterator_types = ["parallel", "parallel", "parallel"]} outs(%arg1 : tensor<1x1x3xf32>) {
^bb0(%out: f32):
%1 = linalg.index 1 : index
%2 = linalg.index 0 : index
%3 = affine.apply #map1(%1, %2, %arg2)
%4 = linalg.index 2 : index
%5 = arith.subi %c2, %4 : index
%extracted = tensor.extract %arg0[%c0, %3, %5] : tensor<1x2x3xf32>
linalg.yield %extracted : f32
} -> tensor<1x1x3xf32>
return %0 : tensor<1x1x3xf32>
}
// CHECK-LABEL: func.func @vectorize_reverse_like_tensor_extract
// CHECK-SAME: %[[ARG0:[0-9a-zA-Z]*]]
// CHECK-SAME: %[[ARG1:[0-9a-zA-Z]*]]
// CHECK-SAME: %[[ARG2:[0-9a-zA-Z]*]]
// CHECK-DAG: %[[CST:.+]] = arith.constant dense<3> : vector<1x1x3xindex>
// CHECK-DAG: %[[C0:.+]] = arith.constant 0 : index
// CHECK-DAG: %[[MASK:.*]] = arith.constant dense<true> : vector<1x1x3xi1>
// CHECK-DAG: %[[PASSTHRU:.*]] = arith.constant dense<0.000000e+00> : vector<1x1x3xf32>
// CHECK-DAG: %[[INIT_IDX:.+]] = arith.constant dense<[2, 1, 0]> : vector<3xindex>
// CHECK: %[[T0:.+]] = vector.broadcast %[[ARG2]] : index to vector<1x1x3xindex>
// CHECK: %[[T1:.+]] = arith.muli %[[T0]], %[[CST]] : vector<1x1x3xindex>
// CHECK: %[[T2:.+]] = vector.broadcast %[[INIT_IDX]]
// CHECK: %[[T3:.+]] = arith.addi %[[T2]], %[[T1]]
// CHECK: %[[GATHER:.*]] = vector.gather %[[ARG0]][%[[C0]], %[[C0]], %[[C0]]] [%[[T3]]], %[[MASK]], %[[PASSTHRU]]
// CHECK: vector.transfer_write %[[GATHER]]

module attributes {transform.with_named_sequence} {
transform.named_sequence @__transform_main(%arg1: !transform.any_op {transform.readonly}) {
%0 = transform.structured.match ops{["linalg.generic"]} in %arg1 : (!transform.any_op) -> !transform.any_op
%1 = transform.get_parent_op %0 {isolated_from_above} : (!transform.any_op) -> !transform.any_op
%2 = transform.structured.vectorize_children_and_apply_patterns %1 { vectorize_nd_extract } : (!transform.any_op) -> !transform.any_op
transform.yield
}
}