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[hmac,dv] TB issue hmac_stress_all_with_rand_reset test "is_idle" #24690

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martin-velay opened this issue Sep 30, 2024 · 0 comments
Open

[hmac,dv] TB issue hmac_stress_all_with_rand_reset test "is_idle" #24690

martin-velay opened this issue Sep 30, 2024 · 0 comments
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@martin-velay
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Component:DV DV issue: testbench, test case, etc. IP:hmac
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Earlgrey-PROD.M7

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Description

UVM_ERROR (hmac_base_vseq.sv:80): is_idle
Command to reproduce with bc90ee9322:
util/dvsim/dvsim.py hw/ip/hmac/dv/hmac_sim_cfg.hjson -i hmac_stress_all_with_rand_reset -t vcs --fixed-seed 50137718212529458093890268432036893881721916430145661069749074293950074877432
@martin-velay martin-velay added Component:DV DV issue: testbench, test case, etc. IP:hmac labels Sep 30, 2024
@martin-velay martin-velay added this to the Earlgrey-PROD.M7 milestone Sep 30, 2024
@martin-velay martin-velay self-assigned this Sep 30, 2024
@martin-velay martin-velay mentioned this issue Dec 20, 2024
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