[hmac,dv] Move IDLE check from vseq to scb #25735
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martin-velay
commented
Dec 20, 2024
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martin-velay
commented
- this PR should fix this issue [hmac,dv] TB issue hmac_stress_all_with_rand_reset test "is_idle" #24690
- Move the IDLE pin check from the base sequence to the SCB as it makes more sense to perform check there.
- Move the IDLE pin check from the base sequence to the SCB as it makes more sense to perform check there. Signed-off-by: Martin Velay <mvelay@lowrisc.org>
vogelpi
approved these changes
Dec 20, 2024
rswarbrick
reviewed
Dec 21, 2024
Comment on lines
+85
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+86
| cfg.clk_rst_vif.wait_clks(1); // Wait one clock cycle to be sure IDLE state will be set | ||
| check_idle(1'b1); // Check IDLE after a reset has occured |
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This looks sensible, but would it make more sense put put it in the fork below? That way, tasks like hmac_process_fifo_status don't have to wait before they start.
| @@ -139,7 +139,6 @@ task hmac_base_vseq::dut_init(string reset_kind = "HARD"); | |||
| if (do_hmac_init) begin | |||
| hmac_init(); | |||
| end | |||
| `DV_CHECK_EQ(cfg.hmac_vif.is_idle(), 1'b1) | |||
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I'm extremely enthusiastic about taking this sort of thing out of the sequences. Thanks!
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