try this #3
Workflow file for this run
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name: adapter1 CI | |
on: | |
push: | |
paths: | |
- adapter1/** | |
- .github/workflows/adapter1_ci.yml | |
jobs: | |
lint_fpga: | |
name: Lint FPGA | |
runs-on: ubuntu-latest | |
defaults: | |
run: | |
working-directory: adapter1/fpga | |
steps: | |
- uses: actions/checkout@v4 | |
- name: Install Verilator | |
run: | | |
sudo apt-get update | |
sudo apt-get install verilator | |
- name: Lint | |
run: make lint | |
test_fpga: | |
name: Test FPGA | |
runs-on: ubuntu-latest | |
defaults: | |
run: | |
working-directory: adapter1/fpga | |
steps: | |
- uses: actions/checkout@v4 | |
- name: Install Icarus Verilog | |
run: | | |
sudo apt-get update | |
sudo apt-get install iverilog | |
- name: Run tests | |
run: make tests |