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Improvements to the mapping framework (#629)
* Add a warning when multi-output gates have better delay than single-output gates * Adding cell libraries in Mockturtle * Adding cell library bindings to mapper experiment * Adding verilog writer for mapped networks (cell_view) with multi-output cell compatibility, CEC for mapped networks with multi-output blocks, and code improvements * Adding filter to use only gates with minimum size for mapping * Adding names_view in emap experiment * Moving emap from experimental to algorithms, verbose option in write_verilog * Adding hybrid matching * Changing the default data stracture of emap to be the block_network * Cleaning emap code * Fixes in write_verilog, adding tests for write_verilog * Fixing warning messages in tech_library * Correcting emap tests * Adding test cases, small fixes * Fix required time decrease with multi-output cells in emap
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Original file line number | Diff line number | Diff line change |
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GATE inv1 1 O=!a; PIN * INV 1 999 0.9 0.3 0.9 0.3 | ||
GATE inv2 2 O=!a; PIN * INV 2 999 1.0 0.1 1.0 0.1 | ||
GATE inv3 3 O=!a; PIN * INV 3 999 1.1 0.09 1.1 0.09 | ||
GATE inv4 4 O=!a; PIN * INV 4 999 1.2 0.07 1.2 0.07 | ||
GATE nand2 2 O=!(a*b); PIN * INV 1 999 1.0 0.2 1.0 0.2 | ||
GATE nand3 3 O=!(a*b*c); PIN * INV 1 999 1.1 0.3 1.1 0.3 | ||
GATE nand4 4 O=!(a*b*c*d); PIN * INV 1 999 1.4 0.4 1.4 0.4 | ||
GATE nor2 2 O=!(a+b); PIN * INV 1 999 1.4 0.5 1.4 0.5 | ||
GATE nor3 3 O=!(a+b+c); PIN * INV 1 999 2.4 0.7 2.4 0.7 | ||
GATE nor4 4 O=!(a+b+c+d); PIN * INV 1 999 3.8 1.0 3.8 1.0 | ||
GATE and2 3 O=a*b; PIN * NONINV 1 999 1.9 0.3 1.9 0.3 | ||
GATE or2 3 O=a+b; PIN * NONINV 1 999 2.4 0.3 2.4 0.3 | ||
GATE xor2a 5 O=a*!b+!a*b; PIN * UNKNOWN 2 999 1.9 0.5 1.9 0.5 | ||
#GATE xor2b 5 O=!(a*b+!a*!b); PIN * UNKNOWN 2 999 1.9 0.5 1.9 0.5 | ||
GATE xnor2a 5 O=a*b+!a*!b; PIN * UNKNOWN 2 999 2.1 0.5 2.1 0.5 | ||
#GATE xnor2b 5 O=!(!a*b+a*!b); PIN * UNKNOWN 2 999 2.1 0.5 2.1 0.5 | ||
GATE aoi21 3 O=!(a*b+c); PIN * INV 1 999 1.6 0.4 1.6 0.4 | ||
GATE aoi22 4 O=!(a*b+c*d); PIN * INV 1 999 2.0 0.4 2.0 0.4 | ||
GATE oai21 3 O=!((a+b)*c); PIN * INV 1 999 1.6 0.4 1.6 0.4 | ||
GATE oai22 4 O=!((a+b)*(c+d)); PIN * INV 1 999 2.0 0.4 2.0 0.4 | ||
GATE buffer 2 O=a; PIN * NONINV 1 999 1.0 0.0 1.0 0.0 | ||
GATE zero 0 O=CONST0; | ||
GATE one 0 O=CONST1; |
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