Disable the PLIC Interrupt Controller

lupyuen2 · May 7, 2024 · 6d66caa · 6d66caa
1 parent c6c0bd3
commit 6d66caa
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Showing 4 changed files with 18 additions and 8 deletions.
diff --git a/arch/risc-v/src/bl808/bl808_irq.c b/arch/risc-v/src/bl808/bl808_irq.c
@@ -46,6 +46,7 @@
 
 void up_irqinitialize(void)
 {
+#ifdef TODO ////
   uintptr_t claim;
 
   /* Disable S-Mode interrupts */
@@ -100,6 +101,7 @@ void up_irqinitialize(void)
 
   up_irq_enable();
 #endif
+#endif //// TODO
 }
 
 /****************************************************************************
@@ -112,6 +114,7 @@ void up_irqinitialize(void)
 
 void up_disable_irq(int irq)
 {
+#ifdef TODO ////
   int extirq;
 
   if (irq == RISCV_IRQ_SOFT)
@@ -142,6 +145,7 @@ void up_disable_irq(int irq)
           PANIC();
         }
     }
+#endif //// TODO
 }
 
 /****************************************************************************
@@ -154,6 +158,7 @@ void up_disable_irq(int irq)
 
 void up_enable_irq(int irq)
 {
+#ifdef TODO ////
   int extirq;
 
   if (irq == RISCV_IRQ_SOFT)
@@ -184,6 +189,7 @@ void up_enable_irq(int irq)
           PANIC();
         }
     }
+#endif //// TODO
 }
 
 irqstate_t up_irq_enable(void)

diff --git a/arch/risc-v/src/bl808/bl808_irq_dispatch.c b/arch/risc-v/src/bl808/bl808_irq_dispatch.c
@@ -51,6 +51,7 @@
 
 void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
 {
+#ifdef TODO ////
   int irq = (vector >> RV_IRQ_MASK) | (vector & 0xf);
 
   /* Firstly, check if the irq is machine external interrupt */
@@ -80,5 +81,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
       putreg32(irq - RISCV_IRQ_EXT, BL808_PLIC_CLAIM);
     }
 
+#endif //// TODO
   return regs;
 }
diff --git a/arch/risc-v/src/bl808/bl808_mm_init.c b/arch/risc-v/src/bl808/bl808_mm_init.c
@@ -52,23 +52,23 @@
 #define MMU_IO_BASE      (0x00000000ul)
 #define MMU_IO_SIZE      (0x40000000ul)
 
-#define MMU_INT_BASE     (0xe0000000ul)
-#define MMU_INT_SIZE     (0x10000000ul)
+//// TODO: #define MMU_INT_BASE     (0xe0000000ul)
+//// TODO: #define MMU_INT_SIZE     (0x10000000ul)
 
 /* Physical and virtual addresses to page tables (vaddr = paddr mapping) */
 
 #define PGT_L1_PBASE     (uintptr_t)&m_l1_pgtable
 #define PGT_L2_PBASE     (uintptr_t)&m_l2_pgtable
-#define PGT_L2_INT_PBASE (uintptr_t)&m_l2_int_pgtable
+//// TODO: #define PGT_L2_INT_PBASE (uintptr_t)&m_l2_int_pgtable
 #define PGT_L3_PBASE     (uintptr_t)&m_l3_pgtable
 #define PGT_L1_VBASE     PGT_L1_PBASE
 #define PGT_L2_VBASE     PGT_L2_PBASE
-#define PGT_L2_INT_VBASE PGT_L2_INT_PBASE
+//// TODO: #define PGT_L2_INT_VBASE PGT_L2_INT_PBASE
 #define PGT_L3_VBASE     PGT_L3_PBASE
 
 #define PGT_L1_SIZE      (512)  /* Enough to map 512 GiB */
 #define PGT_L2_SIZE      (512)  /* Enough to map 1 GiB */
-#define PGT_L2_INT_SIZE  (512)  /* Enough to map 1 GiB */
+//// TODO: #define PGT_L2_INT_SIZE  (512)  /* Enough to map 1 GiB */
 #define PGT_L3_SIZE      (1024) /* Enough to map 4 MiB (2MiB x 2) */
 
 #define SLAB_COUNT       (sizeof(m_l3_pgtable) / RV_MMU_PAGE_SIZE)
@@ -98,7 +98,7 @@ typedef struct pgalloc_slab_s pgalloc_slab_t;
 
 static size_t m_l1_pgtable[PGT_L1_SIZE] locate_data(".pgtables");
 static size_t m_l2_pgtable[PGT_L2_SIZE] locate_data(".pgtables");
-static size_t m_l2_int_pgtable[PGT_L2_INT_SIZE] locate_data(".pgtables");
+//// TODO: static size_t m_l2_int_pgtable[PGT_L2_INT_SIZE] locate_data(".pgtables");
 static size_t m_l3_pgtable[PGT_L3_SIZE] locate_data(".pgtables");
 
 /* Kernel mappings (L1 base) */
@@ -244,6 +244,7 @@ void bl808_kernel_mappings(void)
   mmu_ln_map_region(1, PGT_L1_VBASE, MMU_IO_BASE, MMU_IO_BASE,
                     MMU_IO_SIZE, MMU_THEAD_IO_FLAGS);
 
+#ifdef TODO ////
   /* Map the PLIC with L2 page table */
 
   binfo("map PLIC with L2 page table\n");
@@ -254,6 +255,7 @@ void bl808_kernel_mappings(void)
 
   binfo("connect the L1 and PLIC L2 page tables\n");
   mmu_ln_setentry(1, PGT_L1_VBASE, PGT_L2_INT_PBASE, MMU_INT_BASE, PTE_G);
+#endif //// TODO
 
   /* Map the kernel text and data for L2/L3 */
 

diff --git a/arch/risc-v/src/bl808/hardware/bl808_memorymap.h b/arch/risc-v/src/bl808/hardware/bl808_memorymap.h
@@ -27,7 +27,7 @@
 
 /* Register Base Address ****************************************************/
 
-#define BL808_UART3_BASE   0x30002000ul
-#define BL808_PLIC_BASE    0xe0000000ul
+//// TODO: #define BL808_UART3_BASE   0x30002000ul
+//// TODO: #define BL808_PLIC_BASE    0xe0000000ul
 
 #endif /* __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_MEMORYMAP_H */