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BinExport assertion fail for register (unexpected child expression) #2528
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would you send the be2 to me and i'll triage? |
This is an aarch64 program. The exception occurs with the instruction at 0x53de58. I think this isn't actually a real instruction (Ghidra is probably wrong here), but whatever, we should be able to handle whatever disassembly: The BinExport2 indicates the operand looks like: or maybe its easier to understand, like:
Gemini tells me this isn't actually valid aarch64: But again, we should be able to handle whatever disassembly the system produces, and we'd have to handle this case for the valid vector operands, anyways: Today we assert that register operands have no children: so we have to update this case to handle children, such as with aarch64 vector instructions. |
sample available on request
when passing that exception:
on first triage I see a register with symbol
z3
and child expression.
likely an issue in the BinExport plugin, which could be handled more gracefully here
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