Update part6.md

mariosbf · May 10, 2021 · bbd9013 · bbd9013
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Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/cs132/part6.md b/cs132/part6.md
@@ -2,6 +2,7 @@
 layout: CS132
 title: Processor Architecture
 part: true
+math: true
 pre: part5
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@@ -142,4 +143,4 @@ Many people decided to take a fresh look at the situation and a paper by Patters
 
 This sparked a split in industry, where **ARM** is the main proponent for RISC – their approach was to reduce the set of instructions but retain efficiency and synergy between control signal and control steps, sacrificing backwards compatibility.
 
-**Intel** took a different approach and serves a market which wants backwards compatibility. They took a hybrid approach where the simplest and most commonly used instructions are executed by a RISC core and the more complex ones are **microprogrammed** (CISC). Performance is competitive and legacy software can still run.
+**Intel** took a different approach and serves a market which wants backwards compatibility. They took a hybrid approach where the simplest and most commonly used instructions are executed by a RISC core and the more complex ones are **microprogrammed** (CISC). Performance is competitive and legacy software can still run.