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riscv: Use accessors to page table entries instead of direct dereference
mainline inclusion from mainline-v6.8-rc1 link:deepin-community#398 As very well explained in commit 20a004e ("arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tables"), an architecture whose page table walker can modify the PTE in parallel must use READ_ONCE()/WRITE_ONCE() macro to avoid any compiler transformation. So apply that to riscv which is such architecture. Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Acked-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20231213203001.179237-5-alexghiti@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Han Gao <gaohan@iscas.ac.cn> (cherry picked from commit edf9556) Signed-off-by: Wentao Guan <guanwentao@uniontech.com>
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