Enable f16 in assembly on aarch64 platforms that support it

Signed-off-by: rongfu.leng <lenronfu@gmail.com>

compiler/rustc_hir_analysis/src/check/intrinsicck.rs

@@ -62,6 +62,7 @@ impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> {
  ty::Int(IntTy::I64) | ty::Uint(UintTy::U64) => Some(InlineAsmType::I64),
  ty::Int(IntTy::I128) | ty::Uint(UintTy::U128) => Some(InlineAsmType::I128),
  ty::Int(IntTy::Isize) | ty::Uint(UintTy::Usize) => Some(asm_ty_isize),
+ ty::Float(FloatTy::F16) => Some(InlineAsmType::F16),
  ty::Float(FloatTy::F32) => Some(InlineAsmType::F32),
  ty::Float(FloatTy::F64) => Some(InlineAsmType::F64),
  ty::FnPtr(_) => Some(asm_ty_isize),

compiler/rustc_target/src/asm/aarch64.rs

@@ -59,7 +59,7 @@ impl AArch64InlineAsmRegClass {
  match self {
  Self::reg => types! { _: I8, I16, I32, I64, F32, F64; },
  Self::vreg | Self::vreg_low16 => types! {
- neon: I8, I16, I32, I64, F32, F64,
+ neon: I8, I16, I32, I64, F16, F32, F64,
  VecI8(8), VecI16(4), VecI32(2), VecI64(1), VecF32(2), VecF64(1),
  VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF32(4), VecF64(2);
  },

compiler/rustc_target/src/asm/mod.rs

@@ -707,6 +707,7 @@ pub enum InlineAsmType {
  I32,
  I64,
  I128,
+ F16,
  F32,
  F64,
  VecI8(u64),
@@ -730,6 +731,7 @@ impl InlineAsmType {
  Self::I32 => 4,
  Self::I64 => 8,
  Self::I128 => 16,
+ Self::F16 => 2,
  Self::F32 => 4,
  Self::F64 => 8,
  Self::VecI8(n) => n * 1,
@@ -751,6 +753,7 @@ impl fmt::Display for InlineAsmType {
  Self::I32 => f.write_str("i32"),
  Self::I64 => f.write_str("i64"),
  Self::I128 => f.write_str("i128"),
+ Self::F16 => f.write_str("f16"),
  Self::F32 => f.write_str("f32"),
  Self::F64 => f.write_str("f64"),
  Self::VecI8(n) => write!(f, "i8x{n}"),

tests/ui/asm/aarch64/type-f16.rs

@@ -0,0 +1,17 @@
+//@ only-aarch64
+
+#![feature(f16, f128)]
+use std::arch::asm;
+#[inline(never)]
+pub fn f32_to_f16_asm(a: f32) -> f16 {
+ let ret: f16;
+ unsafe {
+ asm!(
+ "fcvt {ret:h}, {a:s}",
+ a = in(vreg) a,
+ ret = lateout(vreg) ret,
+ options(nomem, nostack),
+ );
+ }
+ ret
+}