riscv: Fix soft float check

michaelforney · Oct 18, 2018 · 3d06ad0 · 3d06ad0
1 parent 8597ffb
commit 3d06ad0
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Showing 9 changed files with 9 additions and 9 deletions.
diff --git a/configure b/configure
@@ -644,7 +644,7 @@ fi
 
 if test "$ARCH" = "riscv32" || test "$ARCH" = "riscv64" ; then
 trycppif "RISCVEB || _RISCVEB || __RISCVEB || __RISCVEB__" "$t" && SUBARCH=${SUBARCH}eb
-trycppif __riscv_soft_float "$t" && SUBARCH=${SUBARCH}-sf
+trycppif __riscv_float_abi_soft "$t" && SUBARCH=${SUBARCH}-sf
 fi
 
 if test "$ARCH" = "sh" ; then

diff --git a/src/fenv/riscv32/fenv-sf.c b/src/fenv/riscv32/fenv-sf.c
@@ -1,3 +1,3 @@
-#ifdef __riscv_soft_float
+#ifndef __riscv_flen
 #include "../fenv.c"
 #endif
diff --git a/src/fenv/riscv32/fenv.S b/src/fenv/riscv32/fenv.S
@@ -1,4 +1,4 @@
-#ifndef __riscv_soft_float
+#ifdef __riscv_flen
 
 .global feclearexcept
 .type feclearexcept, %function

diff --git a/src/fenv/riscv64/fenv-sf.c b/src/fenv/riscv64/fenv-sf.c
@@ -1,3 +1,3 @@
-#ifdef __riscv_soft_float
+#ifndef __riscv_flen
 #include "../fenv.c"
 #endif
diff --git a/src/fenv/riscv64/fenv.S b/src/fenv/riscv64/fenv.S
@@ -1,4 +1,4 @@
-#ifndef __riscv_soft_float
+#ifdef __riscv_flen
 
 .global feclearexcept
 .type feclearexcept, %function

diff --git a/src/setjmp/riscv32/longjmp.S b/src/setjmp/riscv32/longjmp.S
@@ -22,7 +22,7 @@ longjmp:
         lw sp,    48(a0)
         lw ra,    52(a0)
 
-#ifndef __riscv_soft_float
+#ifndef __riscv_float_abi_soft
         fld fs0,  56(a0)
         fld fs1,  64(a0)
         fld fs2,  72(a0)

diff --git a/src/setjmp/riscv32/setjmp.S b/src/setjmp/riscv32/setjmp.S
@@ -22,7 +22,7 @@ setjmp:
         sw sp,    48(a0)
         sw ra,    52(a0)
 
-#ifndef __riscv_soft_float
+#ifndef __riscv_float_abi_soft
         fsd fs0,  56(a0)
         fsd fs1,  64(a0)
         fsd fs2,  72(a0)

diff --git a/src/setjmp/riscv64/longjmp.S b/src/setjmp/riscv64/longjmp.S
@@ -22,7 +22,7 @@ longjmp:
         ld sp,    96(a0)
         ld ra,    104(a0)
 
-#ifndef __riscv_soft_float
+#ifndef __riscv_float_abi_soft
         fld fs0,  112(a0)
         fld fs1,  120(a0)
         fld fs2,  128(a0)

diff --git a/src/setjmp/riscv64/setjmp.S b/src/setjmp/riscv64/setjmp.S
@@ -22,7 +22,7 @@ setjmp:
         sd sp,    96(a0)
         sd ra,    104(a0)
 
-#ifndef __riscv_soft_float
+#ifndef __riscv_float_abi_soft
         fsd fs0,  112(a0)
         fsd fs1,  120(a0)
         fsd fs2,  128(a0)