RDAT: Check flags and WaveSize for min SM; fix flag detection and merging

include/dxc/DXIL/DxilConstants.h

@@ -211,7 +211,8 @@ enum class ShaderKind {
   Last_1_2 = Compute,
   Last_1_4 = Callable,
   Last_1_7 = Amplification,
-  LastValid = Node,
+  Last_1_8 = Node,
+  LastValid = Last_1_8,
 };
 
 // clang-format off
@@ -1862,12 +1863,22 @@ const uint64_t
         0x2000;
 const uint64_t ShaderFeatureInfo_WaveOps = 0x4000;
 const uint64_t ShaderFeatureInfo_Int64Ops = 0x8000;
+
+// SM 6.1+
 const uint64_t ShaderFeatureInfo_ViewID = 0x10000;
 const uint64_t ShaderFeatureInfo_Barycentrics = 0x20000;
+
+// SM 6.2+
 const uint64_t ShaderFeatureInfo_NativeLowPrecision = 0x40000;
+
+// SM 6.4+
 const uint64_t ShaderFeatureInfo_ShadingRate = 0x80000;
+
+// SM 6.5+
 const uint64_t ShaderFeatureInfo_Raytracing_Tier_1_1 = 0x100000;
 const uint64_t ShaderFeatureInfo_SamplerFeedback = 0x200000;
+
+// SM 6.6+
 const uint64_t ShaderFeatureInfo_AtomicInt64OnTypedResource = 0x400000;
 const uint64_t ShaderFeatureInfo_AtomicInt64OnGroupShared = 0x800000;
 const uint64_t ShaderFeatureInfo_DerivativesInMeshAndAmpShaders = 0x1000000;
@@ -1881,14 +1892,30 @@ const uint64_t ShaderFeatureInfo_AdvancedTextureOps = 0x20000000;
 const uint64_t ShaderFeatureInfo_WriteableMSAATextures = 0x40000000;
 
 // SM 6.8+
-// WaveMMA slots in between two SM 6.6 feature bits.
-const uint64_t ShaderFeatureInfo_WaveMMA = 0x8000000;
-
 const uint64_t ShaderFeatureInfo_SampleCmpGradientOrBias = 0x80000000;
 const uint64_t ShaderFeatureInfo_ExtendedCommandInfo = 0x100000000;
 
+// Experimental SM 6.9+ - Reserved, not yet supported.
+// WaveMMA slots in between two SM 6.6 feature bits.
+const uint64_t ShaderFeatureInfo_WaveMMA = 0x8000000;
+
+// Maximum count without rolling over into another 64-bit field is 40,
+// so the last flag we can use for a feature requirement is: 0x8000000000
+// This is because of the following set of flags, considered optional
+// and ignored by the runtime if not recognized:
+// D3D11_OPTIONAL_FEATURE_FLAGS 0x7FFFFF0000000000
 const unsigned ShaderFeatureInfoCount = 33;
 
+// This section is for flags that do not directly indicate a required feature,
+// but are used to indicate something about the shader.
+
+// Create flag here for any derivative use.  This allows call-graph validation
+// in the runtime to detect misuse of derivatives for an entry point that cannot
+// support it, or to determine when the flag
+// ShaderFeatureInfo_DerivativesInMeshAndAmpShaders is required.
+const uint64_t OptFeatureInfo_UsesDerivatives = 0x0000010000000000ULL;
+const unsigned OptFeatureInfoCount = 1;
+
 // DxilSubobjectType must match D3D12_STATE_SUBOBJECT_TYPE, with
 // certain values reserved, since they cannot be used from Dxil.
 enum class SubobjectKind : uint32_t {

include/dxc/DXIL/DxilShaderFlags.h

@@ -125,24 +125,29 @@ class ShaderFlags {
   void SetUAVsAtEveryStage(bool flag) { m_UAVsAtEveryStage = flag; }
   bool GetUAVsAtEveryStage() const { return m_UAVsAtEveryStage; }
 
+  // SM 6.1+
   void SetViewID(bool flag) { m_bViewID = flag; }
   bool GetViewID() const { return m_bViewID; }
 
   void SetBarycentrics(bool flag) { m_bBarycentrics = flag; }
   bool GetBarycentrics() const { return m_bBarycentrics; }
 
+  // SM 6.2+
   void SetUseNativeLowPrecision(bool flag) { m_bUseNativeLowPrecision = flag; }
   bool GetUseNativeLowPrecision() const { return m_bUseNativeLowPrecision; }
 
+  // SM 6.4+
   void SetShadingRate(bool flag) { m_bShadingRate = flag; }
   bool GetShadingRate() const { return m_bShadingRate; }
 
+  // SM 6.5+
   void SetRaytracingTier1_1(bool flag) { m_bRaytracingTier1_1 = flag; }
   bool GetRaytracingTier1_1() const { return m_bRaytracingTier1_1; }
 
   void SetSamplerFeedback(bool flag) { m_bSamplerFeedback = flag; }
   bool GetSamplerFeedback() const { return m_bSamplerFeedback; }
 
+  // SM 6.6+
   void SetAtomicInt64OnTypedResource(bool flag) {
     m_bAtomicInt64OnTypedResource = flag;
   }
@@ -160,7 +165,7 @@ class ShaderFlags {
   void SetDerivativesInMeshAndAmpShaders(bool flag) {
     m_bDerivativesInMeshAndAmpShaders = flag;
   }
-  bool GetDerivativesInMeshAndAmpShaders() {
+  bool GetDerivativesInMeshAndAmpShaders() const {
     return m_bDerivativesInMeshAndAmpShaders;
   }
 
@@ -185,6 +190,7 @@ class ShaderFlags {
     return m_bSamplerDescriptorHeapIndexing;
   }
 
+  // SM 6.7+
   void SetResMayNotAlias(bool flag) { m_bResMayNotAlias = flag; }
   bool GetResMayNotAlias() const { return m_bResMayNotAlias; }
 
@@ -194,9 +200,7 @@ class ShaderFlags {
   void SetWriteableMSAATextures(bool flag) { m_bWriteableMSAATextures = flag; }
   bool GetWriteableMSAATextures() const { return m_bWriteableMSAATextures; }
 
-  void SetWaveMMA(bool flag) { m_bWaveMMA = flag; }
-  bool GetWaveMMA() const { return m_bWaveMMA; }
-
+  // SM 6.8+
   void SetSampleCmpGradientOrBias(bool flag) {
     m_bSampleCmpGradientOrBias = flag;
   }
@@ -205,6 +209,13 @@ class ShaderFlags {
   void SetExtendedCommandInfo(bool flag) { m_bExtendedCommandInfo = flag; }
   bool GetExtendedCommandInfo() const { return m_bExtendedCommandInfo; }
 
+  // Experimental SM 6.9+ - Reserved, not yet supported.
+  void SetWaveMMA(bool flag) { m_bWaveMMA = flag; }
+  bool GetWaveMMA() const { return m_bWaveMMA; }
+
+  void SetUsesDerivatives(bool flag) { m_bUsesDerivatives = flag; }
+  bool GetUsesDerivatives() const { return m_bUsesDerivatives; }
+
 private:
   unsigned
       m_bDisableOptimizations : 1; // D3D11_1_SB_GLOBAL_FLAG_SKIP_OPTIMIZATION
@@ -245,16 +256,22 @@ class ShaderFlags {
   unsigned m_bROVS : 1;         // SHADER_FEATURE_ROVS
   unsigned m_bWaveOps : 1;      // SHADER_FEATURE_WAVE_OPS
   unsigned m_bInt64Ops : 1;     // SHADER_FEATURE_INT64_OPS
+
+  // SM 6.1+
   unsigned m_bViewID : 1;       // SHADER_FEATURE_VIEWID
   unsigned m_bBarycentrics : 1; // SHADER_FEATURE_BARYCENTRICS
 
+  // SM 6.2+
   unsigned m_bUseNativeLowPrecision : 1;
 
+  // SM 6.4+
   unsigned m_bShadingRate : 1; // SHADER_FEATURE_SHADINGRATE
 
+  // SM 6.5+
   unsigned m_bRaytracingTier1_1 : 1; // SHADER_FEATURE_RAYTRACING_TIER_1_1
   unsigned m_bSamplerFeedback : 1;   // SHADER_FEATURE_SAMPLER_FEEDBACK
 
+  // SM 6.6+
   unsigned
       m_bAtomicInt64OnTypedResource : 1; // SHADER_FEATURE_ATOMIC_INT64_ON_TYPED_RESOURCE
   unsigned
@@ -282,12 +299,19 @@ class ShaderFlags {
   unsigned
       m_bWriteableMSAATextures : 1; // SHADER_FEATURE_WRITEABLE_MSAA_TEXTURES
 
-  // SM 6.8+
+  // Experimental SM 6.9+ - Reserved, not yet supported.
   unsigned m_bWaveMMA : 1; // SHADER_FEATURE_WAVE_MMA
+
+  // SM 6.8+
   unsigned
       m_bSampleCmpGradientOrBias : 1; // SHADER_FEATURE_SAMPLE_CMP_GRADIENT_OR_BIAS
   unsigned m_bExtendedCommandInfo : 1; // SHADER_FEATURE_EXTENDED_COMMAND_INFO
-  uint32_t m_align1 : 25;              // align to 64 bit.
+
+  // Per-function flag
+  unsigned m_bUsesDerivatives : 1; // SHADER_FEATURE_OPT_USES_DERIVATIVES
+                                   // (OptFeatureInfo_UsesDerivatives)
+
+  uint32_t m_align1 : 24;              // align to 64 bit.
 };
 
 } // namespace hlsl

lib/DXIL/DxilModule.cpp

@@ -342,6 +342,29 @@ void DxilModule::CollectShaderFlagsForModule(ShaderFlags &Flags) {
   bool hasCSRawAndStructuredViaShader4X =
       hasRawAndStructuredBuffer && m_pSM->GetMajor() == 4 && m_pSM->IsCS();
   Flags.SetCSRawAndStructuredViaShader4X(hasCSRawAndStructuredViaShader4X);
+
+  if (!Flags.GetRaytracingTier1_1()) {
+    if (const DxilSubobjects *pSubobjects = GetSubobjects()) {
+      for (const auto &it : pSubobjects->GetSubobjects()) {
+        switch (it.second->GetKind()) {
+        case DXIL::SubobjectKind::RaytracingPipelineConfig1:
+          Flags.SetRaytracingTier1_1(true);
+          break;
+        case DXIL::SubobjectKind::StateObjectConfig: {
+          uint32_t configFlags;
+          if (it.second->GetStateObjectConfig(configFlags) &&
+              ((configFlags &
+                ~(unsigned)DXIL::StateObjectFlags::ValidMask_1_4) != 0))
+            Flags.SetRaytracingTier1_1(true);
+        } break;
+        default:
+          break;
+        }
+        if (Flags.GetRaytracingTier1_1())
+          break;
+      }
+    }
+  }
 }
 
 void DxilModule::CollectShaderFlagsForModule() {

lib/DXIL/DxilOperations.cpp

@@ -3249,23 +3249,24 @@ void OP::GetMinShaderModelAndMask(const llvm::CallInst *CI,
   if (DXIL::CompareVersions(valMajor, valMinor, 1, 5) < 0) {
     // validator 1.4 didn't exclude wave ops in mask
     if (IsDxilOpWave(opcode))
-      mask = ((unsigned)1 << (unsigned)DXIL::ShaderKind::Invalid) - 1;
-    // These shader models don't exist before 1.5
-    mask &= ~(SFLAG(Amplification) | SFLAG(Mesh));
+      mask = ((unsigned)1 << (unsigned)DXIL::ShaderKind::Mesh) - 1;
     // validator 1.4 didn't have any additional rules applied:
     return;
   }
 
   // Additional rules are applied manually here.
 
-  // Barrier with mode != UAVFenceGlobal requires compute, amplification, or
-  // mesh Instructions: Barrier=80
+  // Barrier with mode != UAVFenceGlobal requires compute, amplification,
+  // mesh, or node. Instructions: Barrier=80
   if (opcode == DXIL::OpCode::Barrier) {
-    DxilInst_Barrier barrier(const_cast<CallInst *>(CI));
-    unsigned mode = barrier.get_barrierMode_val();
-    if (mode != (unsigned)DXIL::BarrierMode::UAVFenceGlobal) {
-      mask =
-          SFLAG(Library) | SFLAG(Compute) | SFLAG(Amplification) | SFLAG(Mesh);
+    // Barrier mode should be a constant, but be robust to non-constants here.
+    if (isa<ConstantInt>(CI->getArgOperand(DxilInst_Barrier::arg_barrierMode))) {
+      DxilInst_Barrier barrier(const_cast<CallInst *>(CI));
+      unsigned mode = barrier.get_barrierMode_val();
+      if (mode != (unsigned)DXIL::BarrierMode::UAVFenceGlobal) {
+        mask &= SFLAG(Library) | SFLAG(Compute) | SFLAG(Amplification) |
+                SFLAG(Mesh) | SFLAG(Node);
+      }
     }
     return;
   }