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A Tic-Tac-Toe implementation using Hardware Definition Language (Verilog) and DE10-Lite Altera Max 10 FPGA.

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Tic-Tac-Toe-On-FPGA

A Tic-Tac-Toe implementation using Hardware Definition Language (Verilog) and DE10-Lite Altera Max 10 FPGA.

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A Tic-Tac-Toe implementation using Hardware Definition Language (Verilog) and DE10-Lite Altera Max 10 FPGA.

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