lib: updatehub support for the modem and fix for zephyrproject-rtos#2…

…4853

Signed-off-by: Tahir Akram <mtahirbutt@hotmail.com>

In this PR, an implementation has been proposed and tested with
DIGI XBC-M5-UT-001 XBee Cellular 3G modem with STM32L475 MCU BSP.

Revert "cmake: introduction of ZephyrExtension package"

This reverts commit ac898bc.

This commit was merged by mistake, but in a way that was against the
decision of the TSC on May 20, 2020, which was to wait a week to let
people digest befor merging.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>

boards: fix the sys ticks per second for emsk

As a slow FPGA platform with max. freq < 25 Mhz,
the default CON_SYS_CLOCK_TICKS_PER_SEC=10000 is
not suitable. CON_SYS_CLOCK_TICKS_PER_SEC=100 is
a better value.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

soc: fix the int numbers of emsdp

emsdp is a FPGA based platform, can be loaded with different
configurations. Different configuration have different
interrupts:

* em5d, em7d and em11d have 111 interrupts
* em4 and em6 have 113 interrupts
* em7d_esp has 112 interrupts

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

tests: add a workaround for arc emsdp

arc emsdp's console will use irq 108/107 which will
conflict with irqs used in tests (emsdp has 112 irqs),
so add a workaround for emsdp.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

dts: arm: Add missing adc property for kinetis k8x and kv5x socs

Adds the required #io-channel-cells property to kinetis k8x and kv5x
socs. We are now consistently defining this property for all
nxp,kinetis-adc16 compatible nodes.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

boards: frdm_k82f: Enable adc instance and pinmux

Enables the adc instance and pinmux associated with arduino header pin
A2 on the frdm_k82 board. Adds adc to the board yaml to ensure we build
adc samples/tests for this board in CI.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

tests: adc: Configure adc_api test for frdm_k82f board

Configures the adc api test to use the arduino header A2 pin on the
frdm_k82f board. This follows frdm_k64f and frdm_kw41z boards, which
also use the arduino header A2 pin for the test.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

tracing: cpu_stats: add missing macro

add missing macro K_MSEC() for CONFIG_TRACING_CPU_STATS_INTERVAL

Signed-off-by: Joel Westerberg <joel@teenage.engineering>

usb: driver: nordic: Unlock mutex in case of error.

Mutex that was previously locked must be unlocked in case
of an error.

Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>

drivers: arcv2_timer0: rename overflow_cyc to overflow_cycles

* rename overflow_cyc to overflow_cycles for better understanding
* use MIN macro to replace if .. else ..
* typo fix in comments

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

drivers: arcv2_timer0: back to use level triggered irq

the pulse triggered timer irq doesn't work for all targets. In
iotdk, we found the clear of IP bit will clear int request
when elapsed called in thread context. So come back to level
triggered way which is supported in all targets, and use the sw
triggered irq to remember the irq request which may be cleared
in non timer int handler.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

drivers: arcv2_timer0: minor fix and optimization for SMP case

* still need to clear IP bit in timer irq handler

* last_time should be aligned to ticks, old code will miss some
cycles which are about (curret_time - last_time) % CYC_PER_TICK

* in timeout set, shorten the delay needed when tick is 0, this
 will improve the response of timer irq

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

dts: arm: Fix incorrect interrupt cells order

In aarch64 DTs, priority and flags cells have been swapped,
fix the same.

Correct interrupt property per the GIC binding document
looks like:
interrupts = <irq_type irq_num irq_flags irq_priority>;

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>

x86: gen_idt.py: typo fix

Fix "consule" as "consult"

Signed-off-by: Ruslan Mstoi <ruslan.mstoi@intel.com>

scripts: net: Fix incorrect error messages

If environment variables ZEPHYR_BASE or NET_TOOLS_BASE are unset, an
incorrect message is printed saying that "it is set, but it is not a
directory":

$ZEPHYR_BASE is unset
$ZEPHYR_BASE is set, but it is not a directory
$NET_TOOLS_BASE is unset, no net-tools found
$NET_TOOLS_BASE set, but it is not a directory

This patch fixes that issue.

Signed-off-by: Ruslan Mstoi <ruslan.mstoi@intel.com>

scripts: gen_offset_header: add argument help text

Help text is set to documentation string of the script.

Signed-off-by: Ruslan Mstoi <ruslan.mstoi@intel.com>

samples: usb: audio: Fix building off sample with sanitycheck

The USB audio samples when added didn't have any tests: sections in the
sample.yaml so they would never get build on any platform as part of
sanitycheck.  Add the tests: section and limit the samples to build on
nrf52840dk_nrf52840 as that was the intended platform these samples
where initially developed for.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

drivers: flash: nrf_qspi_nor: support read of sub-word lengths

mcuboot and possibly other tools read single byte values to determine
the state of objects.  Rather than fail to do the read of values too
short for this peripheral detect the situation and read into a stack
buffer that meets the length criteria, and on success copy the data
into the provided buffer.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>

settings_fcb: Fix storing the data

Change fixes storing the data by adding missing write retry after
the last compression. Without the change error was returned instead
of retrying.

Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>

drivers: timer: nrf: Fix premature timeouts

If timeout is being overwrite exactly when previous one is expiring
then hardware event was cleared correctly but interrupt was already
triggered. Interrupt routine was assuming that compare event is set
and proceed with that assumption. However, in that corner case when
compare event was overwritten and event was cleared, that was not the
case.

As the outcome, timeout could be triggered prematurely. Fixed by
clearing pending interrupt after handling previous compare value.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>

drivers: timer: nrf: Remove RTC1 dependency

Removed RTC1 dependencies in the code. Single define picks the instance.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>

lib:updatehub support for the modem and fix for zephyrproject-rtos#24853

testing

lib: updatehub support for the modem and fix for zephyrproject-rtos#24853

Signed-off-by: Tahir Akram <mtahirbutt@hotmail.com>

This pull request adds support for slower air interfaces
(modem for example) to updatehub lib. Originally updatehub
was designed for high speed fixed LAN interfaces.
Therefore, in this PR, an implementation has been proposed
and tested with DIGI XBC-M5-UT-001 XBee Cellular 3G modem
with STM32L475 MCU BSP. A feedbakc is expected for
evaluation with other interfaces.

Signed-off-by: Tahir Akram <mtahirbutt@hotmail.com>

arch/x86/gen_idt.py

@@ -7,7 +7,7 @@
 """Generate Interrupt Descriptor Table for x86 CPUs.
 
 This script generates the interrupt descriptor table (IDT) for x86.
-Please consule the IA Architecture SW Developer Manual, volume 3,
+Please consult the IA Architecture SW Developer Manual, volume 3,
 for more details on this data structure.
 
 This script accepts as input the zephyr_prebuilt.elf binary,

boards/arc/em_starterkit/em_starterkit_defconfig

@@ -5,6 +5,7 @@ CONFIG_SOC_EMSK=y
 CONFIG_SOC_EMSK_EM9D=y
 CONFIG_BOARD_EM_STARTERKIT=y
 CONFIG_BOARD_EM_STARTERKIT_R23=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
 CONFIG_XIP=n
 CONFIG_BUILD_NO_GAP_FILL=y
 CONFIG_BUILD_OUTPUT_BIN=n

boards/arc/em_starterkit/em_starterkit_em11d_defconfig

@@ -6,6 +6,7 @@ CONFIG_SOC_EMSK_EM11D=y
 CONFIG_BOARD_EM_STARTERKIT=y
 CONFIG_BOARD_EM_STARTERKIT_R23=y
 CONFIG_XIP=n
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
 CONFIG_BUILD_NO_GAP_FILL=y
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_PRINTK=y

boards/arc/em_starterkit/em_starterkit_em7d_defconfig

@@ -6,6 +6,7 @@ CONFIG_SOC_EMSK_EM7D=y
 CONFIG_BOARD_EM_STARTERKIT=y
 CONFIG_BOARD_EM_STARTERKIT_R23=y
 CONFIG_XIP=n
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
 CONFIG_BUILD_NO_GAP_FILL=y
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_PRINTK=y

boards/arc/em_starterkit/em_starterkit_em7d_v22_defconfig

@@ -6,6 +6,7 @@ CONFIG_SOC_EMSK_EM7D=y
 CONFIG_BOARD_EM_STARTERKIT=y
 CONFIG_BOARD_EM_STARTERKIT_R22=y
 CONFIG_XIP=n
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
 CONFIG_BUILD_NO_GAP_FILL=y
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_PRINTK=y

boards/arm/frdm_k82f/frdm_k82f.dts

@@ -106,6 +106,10 @@
 	};
 };
 
+&adc0 {
+	status = "okay";
+};
+
 &gpioa {
 	status = "okay";
 };

boards/arm/frdm_k82f/frdm_k82f.yaml

@@ -9,6 +9,7 @@ toolchain:
 ram: 192
 flash: 256
 supported:
+  - adc
   - arduino_gpio
   - gpio
   - i2c

boards/arm/frdm_k82f/pinmux.c

@@ -77,6 +77,11 @@ static int frdm_k82f_pinmux_init(struct device *dev)
 	pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAlt3));
 #endif
 
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc0), okay)
+	/* ADC0_SE15 */
+	pinmux_pin_set(portc,  1, PORT_PCR_MUX(kPORT_PinDisabledOrAnalog));
+#endif
+
 	return 0;
 }
 

cmake/app/boilerplate.cmake

@@ -89,8 +89,6 @@ if((NOT DEFINED ZEPHYR_BASE) AND (DEFINED ENV_ZEPHYR_BASE))
   set(ZEPHYR_BASE ${ENV_ZEPHYR_BASE} CACHE PATH "Zephyr base")
 endif()
 
-find_package(ZephyrExtension PATHS ${ZEPHYR_BASE}/../* QUIET NO_DEFAULT_PATH NO_POLICY_SCOPE)
-
 # Note any later project() resets PROJECT_SOURCE_DIR
 file(TO_CMAKE_PATH "${ZEPHYR_BASE}" PROJECT_SOURCE_DIR)
 

doc/guides/zephyr_cmake_package.rst

@@ -382,48 +382,6 @@ Such a CMakeLists.txt could look as:
 
    project(my_first_app)
 
-.. _cmake_extension_package:
-
-Zephyr Extension CMake package
-******************************
-
-The Zephyr Extension CMake package provides a possibility for a Zephyr based system to control
-Zephyr build settings in a generic way.
-The Zephyr Extension CMake package will be loaded in the Zephyr boilerplate code after initial
-properties and ``ZEPHYR_BASE`` has been defined, but before CMake code execution.
-This allows the Zephyr Extension CMake package to setup or extend properties such as: ``DTS_ROOT``,
-``BOARD_ROOT``, Fixed overlays, and any other property that can be controlled.
-
-To provide a Zephyr Extension CMake package, create ``ZephyrExtensionConfig.cmake`` and place it in
-a Zephyr workspace top-level folder as:
-
-.. code-block:: none
-
-   <projects>/zephyr-workspace
-   ├── zephyr
-   ├── ...
-   └── zephyr_extension_project (can be named anything)
-        └── share/zephyrextension-package/cmake/ZephyrExtensionConfig.cmake
-
-The Zephyr Extension CMake package will not search in any CMake default search paths, and thus
-cannot be installed in the CMake package registry. There will be no version checking on the Zephyr
-Extension package, as it is the responsibility of the project to ensure that the Zephyr project and
-the ``zephyr_extension_project`` matches in the Zephyr workspace.
-
-A sample ``ZephyrExtensionConfig.cmake`` can be seen below.
-
-.. code-block:: cmake
-
-   # ZephyrExtensionConfig.cmake sample code
-
-   # To ensure final path is absolute and does not contain ../.. in variable.
-   get_filename_component(EXTENSION_PROJECT_DIR
-                          ${CMAKE_CURRENT_LIST_DIR}/../../..
-                          ABSOLUTE
-   )
-
-   list(APPEND BOARD_ROOT ${EXTENSION_PROJECT_DIR})
-
 Zephyr CMake package source code
 ********************************
 

drivers/flash/nrf_qspi_nor.c

@@ -491,12 +491,19 @@ static inline int qspi_nor_read_id(struct device *dev,
 static int qspi_nor_read(struct device *dev, off_t addr, void *dest,
 			 size_t size)
 {
+	void *dptr = dest;
+	size_t dlen = size;
+	u8_t buf[4];
+
 	if (!dest) {
 		return -EINVAL;
 	}
 
 	/* read size must be non-zero multiple of 4 bytes */
-	if (((size % 4U) != 0) || (size == 0)) {
+	if (size < 4U) {
+		dest = buf;
+		size = sizeof(buf);
+	} else if (((size % 4U) != 0) || (size == 0)) {
 		return -EINVAL;
 	}
 	/* address must be 4-byte aligned */
@@ -523,7 +530,13 @@ static int qspi_nor_read(struct device *dev, off_t addr, void *dest,
 
 	qspi_wait_for_completion(dev, res);
 
-	return qspi_get_zephyr_ret_code(res);
+	int rc = qspi_get_zephyr_ret_code(res);
+
+	if ((rc == 0) && (dest != dptr)) {
+		memcpy(dptr, dest, dlen);
+	}
+
+	return rc;
 }
 
 static int qspi_nor_write(struct device *dev, off_t addr, const void *src,

drivers/modem/ublox-sara-r4.c

@@ -1578,11 +1578,26 @@ static int offload_getaddrinfo(const char *node, const char *service,
 	result.ai_addrlen = sizeof(result_addr);
 	result.ai_canonname = result_canonname;
 	result_canonname[0] = '\0';
+
+	if (service) {
+		port = ATOI(service, 0U, "port");
+		if (port < 1 || port > USHRT_MAX) {
+			return EAI_SERVICE;
+		}
+	}
+
+	if (port > 0U) {
+		/* FIXME: DNS is hard-coded to return only IPv4 */
+		if (result.ai_family == AF_INET) {
+			net_sin(&result_addr)->sin_port = htons(port);
+		}
+	}
+
 
 	/* check to see if node is an IP address */
 	if (net_addr_pton(result.ai_family, node,
 			  &((struct sockaddr_in *)&result_addr)->sin_addr)
-	    == 1) {
+	    == 0) {
 		*res = &result;
 		return 0;
 	}
@@ -1592,12 +1607,13 @@ static int offload_getaddrinfo(const char *node, const char *service,
 		return EAI_NONAME;
 	}
 
-	if (service) {
+/*	if (service) {
 		port = ATOI(service, 0U, "port");
 		if (port < 1 || port > USHRT_MAX) {
 			return EAI_SERVICE;
 		}
 	}
+*/
 
 	snprintk(sendbuf, sizeof(sendbuf), "AT+UDNSRN=0,\"%s\"", node);
 	ret = modem_cmd_send(&mctx.iface, &mctx.cmd_handler,
@@ -1607,12 +1623,7 @@ static int offload_getaddrinfo(const char *node, const char *service,
 		return ret;
 	}
 
-	if (port > 0U) {
-		/* FIXME: DNS is hard-coded to return only IPv4 */
-		if (result.ai_family == AF_INET) {
-			net_sin(&result_addr)->sin_port = htons(port);
-		}
-	}
+
 
 	LOG_DBG("DNS RESULT: %s",
 		log_strdup(net_addr_ntop(result.ai_family,

drivers/timer/arcv2_timer0.c

@@ -67,7 +67,7 @@ static u32_t last_load;
 
 /*
  * This local variable holds the amount of timer cycles elapsed
- * and it is updated in z_clock_isr() and z_clock_set_timeout().
+ * and it is updated in z_timer_int_handler and z_clock_set_timeout().
  *
  * Note:
  *  At an arbitrary point in time the "current" value of the
@@ -90,10 +90,10 @@ static u32_t announced_cycles;
  * in elapsed() function, as well as in the updates to cycle_count.
  *
  * Note:
- * Each time cycle_count is updated with the value from overflow_cyc,
- * the overflow_cyc must be reset to zero.
+ * Each time cycle_count is updated with the value from overflow_cycles,
+ * the overflow_cycles must be reset to zero.
  */
-static volatile u32_t overflow_cyc;
+static volatile u32_t overflow_cycles;
 #endif
 
 /**
@@ -168,13 +168,13 @@ static ALWAYS_INLINE void timer0_limit_register_set(u32_t count)
  * updated. 'cycle_count' may be updated either by the ISR, or
  * in z_clock_set_timeout().
  *
- * Additionally, the function updates the 'overflow_cyc' counter, that
+ * Additionally, the function updates the 'overflow_cycles' counter, that
  * holds the amount of elapsed HW cycles due to (possibly) multiple
  * timer wraps (overflows).
  *
  * Prerequisites:
  * - reprogramming of LIMIT must be clearing the COUNT
- * - ISR must be clearing the 'overflow_cyc' counter.
+ * - ISR must be clearing the 'overflow_cycles' counter.
  * - no more than one counter-wrap has occurred between
  *     - the timer reset or the last time the function was called
  *     - and until the current call of the function is completed.
@@ -190,13 +190,22 @@ static u32_t elapsed(void)
 	} while (timer0_count_register_get() < val);
 
 	if (ctrl & _ARC_V2_TMR_CTRL_IP) {
-		overflow_cyc += last_load;
+		overflow_cycles += last_load;
 		/* clear the IP bit of the control register */
 		timer0_control_register_set(_ARC_V2_TMR_CTRL_NH |
 					    _ARC_V2_TMR_CTRL_IE);
+		/* use sw triggered irq to remember the timer irq request
+		 * which may be cleared by the above operation. when elapsed ()
+		 * is called in z_timer_int_handler, no need to do this.
+		 */
+		if (!z_arc_v2_irq_unit_is_in_isr() ||
+		    z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE) != IRQ_TIMER0) {
+			z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT,
+					       IRQ_TIMER0);
+		}
 	}
 
-	return val + overflow_cyc;
+	return val + overflow_cycles;
 }
 #endif
 
@@ -215,29 +224,43 @@ static void timer_int_handler(void *unused)
 	ARG_UNUSED(unused);
 	u32_t dticks;
 
-
 #if defined(CONFIG_SMP) && CONFIG_MP_NUM_CPUS > 1
 	u64_t curr_time;
 	k_spinlock_key_t key;
 
+	/* clear the IP bit of the control register */
+	timer0_control_register_set(_ARC_V2_TMR_CTRL_NH |
+				    _ARC_V2_TMR_CTRL_IE);
 	key = k_spin_lock(&lock);
 	/* gfrc is the wall clock */
 	curr_time = z_arc_connect_gfrc_read();
 
 	dticks = (curr_time - last_time) / CYC_PER_TICK;
-	last_time = curr_time;
+	/* last_time should be aligned to ticks */
+	last_time += dticks * CYC_PER_TICK;
 
 	k_spin_unlock(&lock, key);
 
 	z_clock_announce(dticks);
 #else
+	/* timer_int_handler may be triggered by timer irq or
+	 * software helper irq
+	 */
+
+	/* irq with higher priority may call z_clock_set_timeout
+	 * so need a lock here
+	 */
+	u32_t key;
+
+	key = arch_irq_lock();
+
 	elapsed();
-	cycle_count += overflow_cyc;
-	overflow_cyc = 0;
+	cycle_count += overflow_cycles;
+	overflow_cycles = 0;
 
+	arch_irq_unlock(key);
 
 	dticks = (cycle_count - announced_cycles) / CYC_PER_TICK;
-
 	announced_cycles += dticks * CYC_PER_TICK;
 	z_clock_announce(TICKLESS ? dticks : 1);
 #endif
@@ -270,18 +293,13 @@ int z_clock_driver_init(struct device *device)
 	start_time = last_time;
 #else
 	last_load = CYC_PER_TICK;
-	overflow_cyc = 0;
+	overflow_cycles = 0;
 	announced_cycles = 0;
 
 	IRQ_CONNECT(IRQ_TIMER0, CONFIG_ARCV2_TIMER_IRQ_PRIORITY,
 		    timer_int_handler, NULL, 0);
 
 	timer0_limit_register_set(last_load - 1);
-	/* make timer irq pulse sensitive, and self-clear when it's handled
-	 * then we can clear the IP bit of CTRL in non-interrupt context,
-	 * without missing timer irq.
-	 */
-	z_arc_v2_irq_unit_sensitivity_set(IRQ_TIMER0, 1);
 #ifdef CONFIG_BOOT_TIME_MEASUREMENT
 	cycle_count = timer0_count_register_get();
 #endif
@@ -321,8 +339,12 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
 
 	ticks = MIN(MAX_TICKS, ticks);
 
-	/* Desired delay in the future */
-	delay = (ticks == 0) ? CYC_PER_TICK : ticks * CYC_PER_TICK;
+	/* Desired delay in the future
+	 * use MIN_DEALY here can trigger the timer
+	 * irq more soon, no need to go to CYC_PER_TICK
+	 * later.
+	 */
+	delay = MAX(ticks * CYC_PER_TICK, MIN_DELAY);
 
 	key = arch_irq_lock();
 
@@ -358,7 +380,7 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
 	 * to loss
 	 */
 	timer0_count_register_set(0);
-	overflow_cyc = 0U;
+	overflow_cycles = 0U;
 
 
 	/* normal case */
@@ -384,11 +406,7 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
 		delay -= unannounced;
 		delay = MAX(delay, MIN_DELAY);
 
-		if (delay > MAX_CYCLES) {
-			last_load = MAX_CYCLES;
-		} else {
-			last_load = delay;
-		}
+		last_load = MIN(delay, MAX_CYCLES);
 	}
 
 	timer0_limit_register_set(last_load - 1);