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Improve valid image check to account for ITCM access devices #1457

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merged 1 commit into from
Oct 17, 2019

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antoniofagundes
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Description

  • Add code to parse the reset vector address according to each STM32 series.

Motivation and Context

  • In STM32F series that have ART Accelerator the handlers addresses stored in the vector table are for ITCM access so they need to be parsed to reach the equivalent address in AXI access.
    This is required because the CLR region address is computed from the linker file in all series and using the non-cached address.

How Has This Been Tested?

Screenshots

Types of changes

  • Improvement (non-breaking change that improves a feature, code or algorithm)
  • Bug fix (non-breaking change which fixes an issue)
  • New feature (non-breaking change which adds functionality)
  • Breaking change (fix or feature that would cause existing functionality to change)

Checklist:

  • My code follows the code style of this project.
  • My change requires a change to the documentation.
  • I have updated the documentation accordingly.
  • I have read the CONTRIBUTING document.
  • I have added tests to cover my changes.
  • All new and existing tests passed.

Signed-off-by: António Fagundesantonio.fagundes@eclo.solutions

@nfbot
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nfbot commented Oct 17, 2019

Hi @antoniofagundes,

I'm nanoFramework bot.
Thank you for your contribution!

A human will be reviewing it shortly. 😉

@josesimoes josesimoes added Series: STM32xx Everything related specifically with STM32 targets Type: bug labels Oct 17, 2019
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LGTM

@josesimoes josesimoes merged commit bc129b4 into nanoframework:develop Oct 17, 2019
@antoniofagundes antoniofagundes deleted the patch-4 branch October 17, 2019 16:24
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3 participants