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Adds a config level for SPI on ChibiOS targets #1622

Merged
merged 8 commits into from
May 4, 2020
Merged

Adds a config level for SPI on ChibiOS targets #1622

merged 8 commits into from
May 4, 2020

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networkfusion
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Description

Ensures the targets Port and Pins are correctly assigned for SPI.

Motivation and Context

SPI was not working properly on STM32 (ChibiOS) targets.

How Has This Been Tested?

Screenshots

Types of changes

  • Improvement (non-breaking change that improves a feature, code or algorithm)
  • Bug fix (non-breaking change which fixes an issue)
  • New feature (non-breaking change which adds functionality)
  • Breaking change (fix or feature that would cause existing functionality to change)

Checklist:

  • My code follows the code style of this project.
  • My change requires a change to the documentation.
  • I have updated the documentation accordingly.
  • I have read the CONTRIBUTING document.
  • I have added tests to cover my changes.
  • All new and existing tests passed.

@nfbot
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nfbot commented May 1, 2020

Hi @networkfusion,

I'm nanoFramework bot.
Thank you for your contribution!

A human will be reviewing it shortly. 😉

@networkfusion networkfusion added Platform: STM32 Everything related specifically with ChibiOS platform Area: Interpreter Everything related with the interpreter, execution engine and such Series: STM32xx Everything related specifically with STM32 targets Type: enhancement ⚠️ DO NOT MERGE ⚠️ labels May 1, 2020
@networkfusion
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networkfusion commented May 1, 2020 •
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Merge should only happen once community targets and orgpal branch have been updated to have the required config.

networkfusion and others added 8 commits May 1, 2020 20:27
@networkfusion @josesimoes
Add config for SPI port
0968f73 
ensures GPIO lines are allocated.
@networkfusion @josesimoes
Correct mistakes in the SPI config.
d6eb180
@josesimoes
Add SPI config for STM32F429I
99bda3a 
Signed-off-by: josesimoes <jose.simoes@eclo.solutions>
@josesimoes
Fix missing white space and typo
0716d49 
Signed-off-by: josesimoes <jose.simoes@eclo.solutions>
@josesimoes
Ass SPI config for ND3
44505d0 
Signed-off-by: josesimoes <jose.simoes@eclo.solutions>
@josesimoes
Add SPI config for QUAIL
790f7f4 
Signed-off-by: josesimoes <jose.simoes@eclo.solutions>
@josesimoes
Add SPI config for F091
0bb660b 
- Add to pull in board.c and .h to allow nf  config isolated from ChibiOS.

Signed-off-by: josesimoes <jose.simoes@eclo.solutions>
@josesimoes
Update SPI_CONFIG_PINS macro
e1195fe 
- GPIO port is now required.
- Switched to palSetPadMode API to allow setting all the required GPIO configs.
- Update SPI config declaration on all reference targets.

Signed-off-by: josesimoes <jose.simoes@eclo.solutions>
josesimoes
josesimoes approved these changes May 1, 2020
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@josesimoes josesimoes left a comment

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Now LGTM!

@josesimoes
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  • orgpal3 branch updated and changes commited
  • community targets updated, PR waiting fo review & merge

piwi1263
piwi1263 approved these changes May 4, 2020
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LGTM

@josesimoes josesimoes merged commit 2f6a57d into develop May 4, 2020
@josesimoes josesimoes deleted the develop-spifix branch May 4, 2020 07:40
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@piwi1263 piwi1263 piwi1263 approved these changes

@josesimoes josesimoes josesimoes approved these changes

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Area: Interpreter Everything related with the interpreter, execution engine and such Platform: STM32 Everything related specifically with ChibiOS platform Series: STM32xx Everything related specifically with STM32 targets Type: enhancement
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4 participants
@networkfusion @nfbot @josesimoes @piwi1263