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Improvements in STM32 I2C class lib code #685

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May 24, 2018
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Merged

Improvements in STM32 I2C class lib code #685

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bdd08b9
Improvements in STM32 I2C class lib code
josesimoes May 14, 2018
ea37b5d
Merge branch 'develop' into improvements-i2c-stm32
josesimoes May 16, 2018
8701de3
Merge branch 'develop' into improvements-i2c-stm32
josesimoes May 16, 2018
9fd2ea7
Merge branch 'develop' into improvements-i2c-stm32
josesimoes May 17, 2018
18cf561
Merge branch 'develop' into improvements-i2c-stm32
piwi1263 May 23, 2018
7139e82
Merge branch 'develop' into improvements-i2c-stm32
josesimoes May 24, 2018
66ac54b
Merge branch 'develop' into improvements-i2c-stm32
josesimoes May 24, 2018
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30 changes: 3 additions & 27 deletions targets/CMSIS-OS/ChibiOS/MBN_QUAIL/target_windows_devices_i2c_config.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5,30 +5,6 @@

#include "win_dev_i2c_native.h"

//////////
// I2C1 //
//////////

// buffers size
// tx buffer size (in bytes)
#define I2C1_WR_SIZE 100
// rx buffer size (in bytes)
#define I2C1_RD_SIZE 100

// buffers declaration
// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary
// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache)
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_WriteBuffer[I2C1_WR_SIZE];
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_ReadBuffer[I2C1_RD_SIZE];

// initialization for I2C1
I2C_INIT(1, I2C1_WR_SIZE, I2C1_RD_SIZE)

// un-initialization for I2C1
I2C_UNINIT(1)
///////////////////////////////////////////////////////////////////////////////////////////////////
// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION //
///////////////////////////////////////////////////////////////////////////////////////////////////
30 changes: 3 additions & 27 deletions targets/CMSIS-OS/ChibiOS/NETDUINO3_WIFI/target_windows_devices_i2c_config.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5,30 +5,6 @@

#include "win_dev_i2c_native.h"

//////////
// I2C1 //
//////////

// buffers size
// tx buffer size (in bytes)
#define I2C1_WR_SIZE 100
// rx buffer size (in bytes)
#define I2C1_RD_SIZE 100

// buffers declaration
// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary
// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache)
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_WriteBuffer[I2C1_WR_SIZE];
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_ReadBuffer[I2C1_RD_SIZE];

// initialization for I2C1
I2C_INIT(1, I2C1_WR_SIZE, I2C1_RD_SIZE)

// un-initialization for I2C1
I2C_UNINIT(1)
///////////////////////////////////////////////////////////////////////////////////////////////////
// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION //
///////////////////////////////////////////////////////////////////////////////////////////////////
58 changes: 3 additions & 55 deletions targets/CMSIS-OS/ChibiOS/ST_NUCLEO144_F746ZG/target_windows_devices_i2c_config.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5,58 +5,6 @@

#include "win_dev_i2c_native.h"

//////////
// I2C1 //
//////////

// buffers size
// tx buffer size (in bytes)
#define I2C1_WR_SIZE 100
// rx buffer size (in bytes)
#define I2C1_RD_SIZE 100

// buffers declaration
// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary
// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache)
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_WriteBuffer[I2C1_WR_SIZE];
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_ReadBuffer[I2C1_RD_SIZE];

// initialization for I2C1
I2C_INIT(1, I2C1_WR_SIZE, I2C1_RD_SIZE)

// un-initialization for I2C1
I2C_UNINIT(1)

//////////
// I2C2 //
//////////

// buffers size
// tx buffer size (in bytes)
#define I2C2_WR_SIZE 100
// rx buffer size (in bytes)
#define I2C2_RD_SIZE 100

// buffers declaration
// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary
// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache)
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C2_WriteBuffer[I2C2_WR_SIZE];
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C2_ReadBuffer[I2C2_RD_SIZE];

// initialization for I2C2
I2C_INIT(2, I2C2_WR_SIZE, I2C2_RD_SIZE)

// un-initialization for I2C2
I2C_UNINIT(2)
///////////////////////////////////////////////////////////////////////////////////////////////////
// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION //
///////////////////////////////////////////////////////////////////////////////////////////////////
30 changes: 3 additions & 27 deletions targets/CMSIS-OS/ChibiOS/ST_STM32F429I_DISCOVERY/target_windows_devices_i2c_config.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5,30 +5,6 @@

#include "win_dev_i2c_native.h"

//////////
// I2C3 //
//////////

// buffers size
// write buffer size (in bytes)
#define I2C3_WR_SIZE 100
// read buffer size (in bytes)
#define I2C3_RD_SIZE 100

// buffers declaration
// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary
// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache)
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C3_WriteBuffer[I2C3_WR_SIZE];
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C3_ReadBuffer[I2C3_RD_SIZE];

// initialization of I2C3 PAL structure
I2C_INIT(3, I2C3_WR_SIZE, I2C3_RD_SIZE)

// un-initialization of I2C3 PAL structure
I2C_UNINIT(3)
///////////////////////////////////////////////////////////////////////////////////////////////////
// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION //
///////////////////////////////////////////////////////////////////////////////////////////////////
30 changes: 3 additions & 27 deletions targets/CMSIS-OS/ChibiOS/ST_STM32F4_DISCOVERY/target_windows_devices_i2c_config.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5,30 +5,6 @@

#include "win_dev_i2c_native.h"

//////////
// I2C1 //
//////////

// buffers size
// tx buffer size (in bytes)
#define I2C1_WR_SIZE 100
// rx buffer size (in bytes)
#define I2C1_RD_SIZE 100

// buffers declaration
// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary
// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache)
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_WriteBuffer[I2C1_WR_SIZE];
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_ReadBuffer[I2C1_RD_SIZE];

// initialization for I2C1
I2C_INIT(1, I2C1_WR_SIZE, I2C1_RD_SIZE)

// un-initialization for I2C1
I2C_UNINIT(1)
///////////////////////////////////////////////////////////////////////////////////////////////////
// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION //
///////////////////////////////////////////////////////////////////////////////////////////////////
30 changes: 3 additions & 27 deletions targets/CMSIS-OS/ChibiOS/ST_STM32F769I_DISCOVERY/target_windows_devices_i2c_config.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5,30 +5,6 @@

#include "win_dev_i2c_native.h"

//////////
// I2C1 //
//////////

// buffers size
// tx buffer size (in bytes)
#define I2C1_WR_SIZE 100
// rx buffer size (in bytes)
#define I2C1_RD_SIZE 100

// buffers declaration
// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary
// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache)
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_WriteBuffer[I2C1_WR_SIZE];
#if defined(__GNUC__)
__attribute__((aligned (32)))
#endif
uint8_t I2C1_ReadBuffer[I2C1_RD_SIZE];

// initialization for I2C1
I2C_INIT(1, I2C1_WR_SIZE, I2C1_RD_SIZE)

// un-initialization for I2C1
I2C_UNINIT(1)
///////////////////////////////////////////////////////////////////////////////////////////////////
// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION //
///////////////////////////////////////////////////////////////////////////////////////////////////
50 changes: 3 additions & 47 deletions targets/CMSIS-OS/ChibiOS/nanoCLR/Windows.Devices.I2c/win_dev_i2c_native.h
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Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,8 @@ struct Library_win_dev_i2c_native_Windows_Devices_I2c_I2cDevice
NANOCLR_NATIVE_DECLARE(GetDeviceSelector___STATIC__STRING);

//--//
static void GetConfig(CLR_RT_HeapBlock* managedConfig, I2CConfig* llConfig);
static void GetI2cConfig(CLR_RT_HeapBlock* managedConfig, I2CConfig* llConfig);
static bool IsLongRunningOperation(int writeSize, int readSize, float byteTime, int& estimatedDurationMiliseconds);
};

struct Library_win_dev_i2c_native_Windows_Devices_I2c_I2cTransferResult
Expand All @@ -67,6 +68,7 @@ struct NF_PAL_I2C
I2CConfig Configuration;
thread_t* WorkingThread;
i2caddr_t Address;
float ByteTime;

uint8_t* WriteBuffer;
uint8_t WriteSize;
Expand All @@ -91,50 +93,4 @@ struct NF_PAL_I2C
extern NF_PAL_I2C I2C4_PAL;
#endif


/////////////////////////////////////
// I2C Tx buffers //
// these live in the target folder //
/////////////////////////////////////
extern uint8_t I2C1_WriteBuffer[];
extern uint8_t I2C2_WriteBuffer[];
extern uint8_t I2C3_WriteBuffer[];
extern uint8_t I2C4_WriteBuffer[];


/////////////////////////////////////
// I2C Rx buffers //
// these live in the target folder //
/////////////////////////////////////
extern uint8_t I2C1_ReadBuffer[];
extern uint8_t I2C2_ReadBuffer[];
extern uint8_t I2C3_ReadBuffer[];
extern uint8_t I2C4_ReadBuffer[];


// the following macro defines a function that initializes an I2C struct
// it gets called in the Windows_Devices_I2c_I2cDevice::NativeInit function
#define I2C_INIT(num, tx_buffer_size, rx_buffer_size) void Init_I2C##num() { \
I2C##num##_PAL.WriteBuffer = I2C##num##_WriteBuffer; \
I2C##num##_PAL.ReadBuffer = I2C##num##_ReadBuffer; \
}

// when a I2C is defined the declarations bellow will have the real function/configuration
// in the target folder @ target_windows_devices_i2c_config.cpp
void Init_I2C1();
void Init_I2C2();
void Init_I2C3();
void Init_I2C4();

// the following macro defines a function that un initializes an I2C struct
// it gets called in the Windows_Devices_I2c_I2cDevice::NativeDispose function
#define I2C_UNINIT(num) void UnInit_I2C##num() { return; }

// when a I2C is defined the declarations bellow will have the real function/configuration
// in the target folder @ target_windows_devices_i2c_config.cpp
void UnInit_I2C1();
void UnInit_I2C2();
void UnInit_I2C3();
void UnInit_I2C4();

#endif //_WIN_DEV_I2C_NATIVE_H_
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