Modernise underlying data structure for node voltages #1929
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I'm delighted to see that nrn/test/datahandle/test.py is working without address sanitizer complaints! Compiling did require: to avoid issues with but I think you already resolved that in another PR. If not, let me know and I'll push this change to this PR. |
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Codecov Report
@@ Coverage Diff @@
## master #1929 +/- ##
==========================================
+ Coverage 47.51% 47.85% +0.34%
==========================================
Files 528 541 +13
Lines 118852 119572 +720
==========================================
+ Hits 56468 57223 +755
+ Misses 62384 62349 -35
📣 We’re building smart automated test selection to slash your CI/CD build times. Learn more |
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- STETransition et al. now use STL components. - Removal of #if 0 block in nrn_finitialize fixes formatting there. - table_check_ no longer uses Datum. - PyHocObject is consistently defined in only one place. - Exception messages are printed to stderr when they are caught. - example_nmodl tests are unpacked into different tests, Python versions are run (not just HOC). - "Test fast_imem calculation" tests now check status codes.
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* hoist and match several changes from #1929 in order to reduce its diff * hack _pval <-> pval for backward MDB compatibility
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Closing this as it is included in #2027. |
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* hoist and match several changes from #1929 in order to reduce its diff * hack _pval <-> pval for backward MDB compatibility
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First attempt at importing the ideas of https://github.com/neuronsimulator/data-structure-design into NEURON.
Very WIP, detailed review not advised.