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Memory map
Jonathan Neuschäfer edited this page Dec 15, 2022
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5 revisions
32-bit MIPS CPUs have cached/uncached views of the same physical address spaces at different "segments", called kseg0, kseg1, etc.
segment | CPU address | description |
---|---|---|
kuseg | 0x00000000 | cached, translated access |
kseg0 | 0x80000000 | cached, untranslated access |
kseg1 | 0xa0000000 | uncached, untranslated access |
This means that the size of the physical address space is effectively just 0x20000000 (512 MiB).
physical | kseg0 | kseg1 | size | description |
---|---|---|---|---|
0x00000000 |
0x80000000 |
0xa0000000 |
64 MiB | DRAM |
0x04000000 |
0x84000000 |
0xa4000000 |
64 MiB x N | DRAM (more mirrors) |
0x1c000000 |
0x9c000000 |
0xbc000000 |
32 MiB | DRAM (last mirror) |
0x1e000000 |
0x9e000000 |
0xbe000000 |
4 MiB | Presumably on-chip RAM |
0x1e400000 |
0x9e400000 |
0xbe400000 |
4 MiB | mirror of 0x1e000000 |
0x1f010000 |
0xbf010000 |
SPI0 (read from the first register stalls the CPU) | ||
0x1f060000 |
0xbf060000 |
USB 0 | ||
0x1f070000 |
0xbf070000 |
USB 1 | ||
0x1f100000 |
0xbf100000 |
Interrupt controller | ||
0x1f140000 |
0xbf140000 |
|||
0x1f156000 |
0xbf156000 |
|||
0x1f420000 |
0xbf420000 |
JPEG engine | ||
0x1f540000 |
0xbf540000 |
UART 0 | ||
0x1f550000 |
0xbf550000 |
UART 1 | ||
0x1f5d0000 |
0xbf5d0000 |
HDMI controller |
Overview:
Basics:
Peripherals:
Hardware:
Misc: