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There's a race for ow.write() / ow.write_bytes() with power enabled between the driver code to activate the strong output driver and any random interrupt. Looking at `onewire_write_bit() for the 0 case:
write '0' slot generation is protected against interrupts
unprotected phase begins and contains some µs delay plus the return back to onewire_write()
interrupts are masked again and the output driver is activated in line 175
If an interrupt occurs during the unprotected phase or a previously pending interrupt gets scheduled, the delay between the last bit's write slot and the activation of the strong output driver will be extended by some 10s of microseconds. This is a potential stability issue for ds18b20 et.al. sensors in parasite power mode which dictate TSPON(max) to be 10 µs.
I suspect that the strong driver has to be activated at the end of the last bit, still within the phase where interrupts are masked by onewire_write_bit().
The text was updated successfully, but these errors were encountered:
There's a race for
ow.write() / ow.write_bytes()
withpower
enabled between the driver code to activate the strong output driver and any random interrupt. Looking at `onewire_write_bit() for the 0 case:onewire_write()
If an interrupt occurs during the unprotected phase or a previously pending interrupt gets scheduled, the delay between the last bit's write slot and the activation of the strong output driver will be extended by some 10s of microseconds. This is a potential stability issue for ds18b20 et.al. sensors in parasite power mode which dictate TSPON(max) to be 10 µs.
I suspect that the strong driver has to be activated at the end of the last bit, still within the phase where interrupts are masked by
onewire_write_bit()
.The text was updated successfully, but these errors were encountered: