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fix: Remove cast for field comparisons in brillig #2874

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Sep 27, 2023
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fix: Remove cast for field comparisons in brillig #2874

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21 changes: 2 additions & 19 deletions compiler/noirc_evaluator/src/brillig/brillig_gen/brillig_block.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@
use acvm::acir::brillig::{BinaryFieldOp, BinaryIntOp, HeapArray, RegisterIndex, RegisterOrMemory};
use acvm::brillig_vm::brillig::HeapVector;
use acvm::FieldElement;
use fxhash::{FxHashMap as HashMap, FxHashSet as HashSet};

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use iter_extended::vecmap;

use super::brillig_black_box::convert_black_box_call;
Expand Down Expand Up @@ -963,7 +963,7 @@

/// Slices have a tuple structure (slice length, slice contents) to enable logic
/// that uses dynamic slice lengths (such as with merging slices in the flattening pass).
/// This method codegens an update to the slice length.

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///
/// The binary operation performed on the slice length is always an addition or subtraction of `1`.
/// This is because the slice length holds the user length (length as displayed by a `.len()` call),
Expand Down Expand Up @@ -1034,29 +1034,12 @@
let binary_type =
type_of_binary_operation(dfg[binary.lhs].get_type(), dfg[binary.rhs].get_type());

let mut left = self.convert_ssa_register_value(binary.lhs, dfg);
let mut right = self.convert_ssa_register_value(binary.rhs, dfg);
let left = self.convert_ssa_register_value(binary.lhs, dfg);
let right = self.convert_ssa_register_value(binary.rhs, dfg);

let brillig_binary_op =
convert_ssa_binary_op_to_brillig_binary_op(binary.operator, &binary_type);

// Some binary operations with fields are issued by the compiler, such as loop comparisons, cast those to the bit size here
// TODO Remove after fixing https://github.com/noir-lang/noir/issues/1979
if let (
BrilligBinaryOp::Integer { bit_size, .. },
Type::Numeric(NumericType::NativeField),
) = (&brillig_binary_op, &binary_type)
{
let new_lhs = self.brillig_context.allocate_register();
let new_rhs = self.brillig_context.allocate_register();

self.brillig_context.cast_instruction(new_lhs, left, *bit_size);
self.brillig_context.cast_instruction(new_rhs, right, *bit_size);

left = new_lhs;
right = new_rhs;
}

self.brillig_context.binary_instruction(left, right, result_register, brillig_binary_op);
}

Expand Down