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fix: print ssa blocks without recursion #6715

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Dec 6, 2024
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29 changes: 4 additions & 25 deletions compiler/noirc_evaluator/src/ssa/ir/printer.rs
Original file line number Diff line number Diff line change
@@ -1,8 +1,5 @@
//! This file is for pretty-printing the SSA IR in a human-readable form for debugging.
use std::{
collections::HashSet,
fmt::{Formatter, Result},
};
use std::fmt::{Formatter, Result};

use acvm::acir::AcirField;
use im::Vector;
Expand All @@ -21,28 +18,10 @@ use super::{
/// Helper function for Function's Display impl to pretty-print the function with the given formatter.
pub(crate) fn display_function(function: &Function, f: &mut Formatter) -> Result {
writeln!(f, "{} fn {} {} {{", function.runtime(), function.name(), function.id())?;
display_block_with_successors(function, function.entry_block(), &mut HashSet::new(), f)?;
write!(f, "}}")
}

/// Displays a block followed by all of its successors recursively.
/// This uses a HashSet to keep track of the visited blocks. Otherwise
/// there would be infinite recursion for any loops in the IR.
pub(crate) fn display_block_with_successors(
function: &Function,
block_id: BasicBlockId,
visited: &mut HashSet<BasicBlockId>,
f: &mut Formatter,
) -> Result {
display_block(function, block_id, f)?;
visited.insert(block_id);

for successor in function.dfg[block_id].successors() {
if !visited.contains(&successor) {
display_block_with_successors(function, successor, visited, f)?;
}
for block_id in function.reachable_blocks() {
display_block(function, block_id, f)?;
}
Ok(())
write!(f, "}}")
}

/// Display a single block. This will not display the block's successors.
Expand Down
4 changes: 2 additions & 2 deletions compiler/noirc_evaluator/src/ssa/opt/array_set.rs
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
impl Function {
pub(crate) fn array_set_optimization(&mut self) {
if matches!(self.runtime(), RuntimeType::Brillig(_)) {
// Brillig is supposed to use refcounting to decide whether to mutate an array;

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Unknown word (refcounting)
// array mutation was only meant for ACIR. We could use it with Brillig as well,
// but then some of the optimizations that we can do in ACIR around shared
// references have to be skipped, which makes it more cumbersome.
Expand Down Expand Up @@ -209,6 +209,8 @@
b1(v0: u32):
v8 = lt v0, u32 5
jmpif v8 then: b3, else: b2
b2():
return
b3():
v9 = eq v0, u32 5
jmpif v9 then: b4, else: b5
Expand All @@ -224,8 +226,6 @@
store v15 at v4
v17 = add v0, u32 1
jmp b1(v17)
b2():
return
}
";
let ssa = Ssa::from_str(src).unwrap();
Expand Down
12 changes: 6 additions & 6 deletions compiler/noirc_evaluator/src/ssa/opt/constant_folding.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1521,18 +1521,18 @@ mod test {
b0(v0: u32):
v2 = eq v0, u32 0
jmpif v2 then: b4, else: b1
b4():
v5 = sub v0, u32 1
jmp b5()
b5():
return
b1():
jmpif v0 then: b3, else: b2
b2():
jmp b5()
b3():
v4 = sub v0, u32 1 // We can't hoist this because v0 is zero here and it will lead to an underflow
jmp b5()
b2():
b4():
v5 = sub v0, u32 1
jmp b5()
b5():
return
}
";
let ssa = Ssa::from_str(src).unwrap();
Expand Down
78 changes: 39 additions & 39 deletions compiler/noirc_evaluator/src/ssa/opt/loop_invariant.rs
Original file line number Diff line number Diff line change
Expand Up @@ -251,13 +251,13 @@ mod test {
b1(v2: u32):
v5 = lt v2, u32 4
jmpif v5 then: b3, else: b2
b2():
return
b3():
v6 = mul v0, v1
constrain v6 == u32 6
v8 = add v2, u32 1
jmp b1(v8)
b2():
return
}
";

Expand All @@ -276,12 +276,12 @@ mod test {
b1(v2: u32):
v6 = lt v2, u32 4
jmpif v6 then: b3, else: b2
b2():
return
b3():
constrain v3 == u32 6
v9 = add v2, u32 1
jmp b1(v9)
b2():
return
}
";

Expand All @@ -300,21 +300,21 @@ mod test {
b1(v2: u32):
v6 = lt v2, u32 4
jmpif v6 then: b3, else: b2
b2():
return
b3():
jmp b4(u32 0)
b4(v3: u32):
v7 = lt v3, u32 4
jmpif v7 then: b6, else: b5
b5():
v9 = add v2, u32 1
jmp b1(v9)
b6():
v10 = mul v0, v1
constrain v10 == u32 6
v12 = add v3, u32 1
jmp b4(v12)
b5():
v9 = add v2, u32 1
jmp b1(v9)
b2():
return
}
";

Expand All @@ -333,20 +333,20 @@ mod test {
b1(v2: u32):
v7 = lt v2, u32 4
jmpif v7 then: b3, else: b2
b2():
return
b3():
jmp b4(u32 0)
b4(v3: u32):
v8 = lt v3, u32 4
jmpif v8 then: b6, else: b5
b5():
v10 = add v2, u32 1
jmp b1(v10)
b6():
constrain v4 == u32 6
v12 = add v3, u32 1
jmp b4(v12)
b5():
v10 = add v2, u32 1
jmp b1(v10)
b2():
return
}
";

Expand Down Expand Up @@ -374,15 +374,15 @@ mod test {
b1(v2: u32):
v5 = lt v2, u32 4
jmpif v5 then: b3, else: b2
b2():
return
b3():
v6 = mul v0, v1
v7 = mul v6, v0
v8 = eq v7, u32 12
constrain v7 == u32 12
v9 = add v2, u32 1
jmp b1(v9)
b2():
return
}
";

Expand All @@ -402,12 +402,12 @@ mod test {
b1(v2: u32):
v9 = lt v2, u32 4
jmpif v9 then: b3, else: b2
b2():
return
b3():
constrain v4 == u32 12
v11 = add v2, u32 1
jmp b1(v11)
b2():
return
}
";

Expand All @@ -431,17 +431,17 @@ mod test {
b1(v2: u32):
v7 = lt v2, u32 4
jmpif v7 then: b3, else: b2
b2():
v8 = load v5 -> [u32; 5]
v10 = array_get v8, index u32 2 -> u32
constrain v10 == u32 3
return
b3():
v12 = load v5 -> [u32; 5]
v13 = array_set v12, index v0, value v1
store v13 at v5
v15 = add v2, u32 1
jmp b1(v15)
b2():
v8 = load v5 -> [u32; 5]
v10 = array_get v8, index u32 2 -> u32
constrain v10 == u32 3
return
}
";

Expand Down Expand Up @@ -485,16 +485,24 @@ mod test {
b1(v2: u32):
v9 = lt v2, u32 4
jmpif v9 then: b3, else: b2
b2():
return
b3():
jmp b4(u32 0)
b4(v3: u32):
v10 = lt v3, u32 4
jmpif v10 then: b6, else: b5
b5():
v12 = add v2, u32 1
jmp b1(v12)
b6():
jmp b7(u32 0)
b7(v4: u32):
v13 = lt v4, u32 4
jmpif v13 then: b9, else: b8
b8():
v14 = add v3, u32 1
jmp b4(v14)
b9():
v15 = array_get v6, index v2 -> u32
v16 = eq v15, v0
Expand All @@ -504,14 +512,6 @@ mod test {
constrain v17 == v0
v19 = add v4, u32 1
jmp b7(v19)
b8():
v14 = add v3, u32 1
jmp b4(v14)
b5():
v12 = add v2, u32 1
jmp b1(v12)
b2():
return
}
";

Expand All @@ -526,33 +526,33 @@ mod test {
b1(v2: u32):
v9 = lt v2, u32 4
jmpif v9 then: b3, else: b2
b2():
return
b3():
v10 = array_get v6, index v2 -> u32
v11 = eq v10, v0
jmp b4(u32 0)
b4(v3: u32):
v12 = lt v3, u32 4
jmpif v12 then: b6, else: b5
b5():
v14 = add v2, u32 1
jmp b1(v14)
b6():
v15 = array_get v6, index v3 -> u32
v16 = eq v15, v0
jmp b7(u32 0)
b7(v4: u32):
v17 = lt v4, u32 4
jmpif v17 then: b9, else: b8
b8():
v18 = add v3, u32 1
jmp b4(v18)
b9():
constrain v10 == v0
constrain v15 == v0
v19 = add v4, u32 1
jmp b7(v19)
b8():
v18 = add v3, u32 1
jmp b4(v18)
b5():
v14 = add v2, u32 1
jmp b1(v14)
b2():
return
}
";

Expand Down
28 changes: 14 additions & 14 deletions compiler/noirc_evaluator/src/ssa/opt/mem2reg.rs
Original file line number Diff line number Diff line change
Expand Up @@ -66,7 +66,7 @@
//!
//! Repeating this algorithm for each block in the function in program order should result in
//! optimizing out most known loads. However, identifying all aliases correctly has been proven
//! undecidable in general (Landi, 1992). So this pass will not always optimize out all loads

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//! that could theoretically be optimized out. This pass can be performed at any time in the
//! SSA optimization pipeline, although it will be more successful the simpler the program's CFG is.
//! This pass is currently performed several times to enable other passes - most notably being
Expand Down Expand Up @@ -127,7 +127,7 @@
/// Load and Store instructions that should be removed at the end of the pass.
///
/// We avoid removing individual instructions as we go since removing elements
/// from the middle of Vecs many times will be slower than a single call to `retain`.

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instructions_to_remove: HashSet<InstructionId>,

/// Track a value's last load across all blocks.
Expand Down Expand Up @@ -1121,11 +1121,6 @@
b1(v0: Field):
v4 = eq v0, Field 0
jmpif v4 then: b3, else: b2
b3():
v11 = load v3 -> &mut Field
store Field 2 at v11
v13 = add v0, Field 1
jmp b1(v13)
b2():
v5 = load v1 -> Field
v7 = eq v5, Field 2
Expand All @@ -1135,6 +1130,11 @@
v10 = eq v9, Field 2
constrain v9 == Field 2
return
b3():
v11 = load v3 -> &mut Field
store Field 2 at v11
v13 = add v0, Field 1
jmp b1(v13)
}
";

Expand All @@ -1157,11 +1157,6 @@
b1(v0: Field):
v4 = eq v0, Field 0
jmpif v4 then: b3, else: b2
b3():
v13 = load v3 -> &mut Field
store Field 2 at v13
v15 = add v0, Field 1
jmp b1(v15)
b2():
v5 = load v1 -> Field
v7 = eq v5, Field 2
Expand All @@ -1173,6 +1168,11 @@
v12 = eq v11, Field 2
constrain v11 == Field 2
return
b3():
v13 = load v3 -> &mut Field
store Field 2 at v13
v15 = add v0, Field 1
jmp b1(v15)
}
acir(inline) fn foo f1 {
b0(v0: &mut Field):
Expand All @@ -1195,6 +1195,10 @@
acir(inline) fn main f0 {
b0(v0: u1):
jmpif v0 then: b2, else: b1
b1():
v4 = allocate -> &mut Field
store Field 1 at v4
jmp b3(v4, v4, v4)
b2():
v6 = allocate -> &mut Field
store Field 0 at v6
Expand All @@ -1212,10 +1216,6 @@
constrain v11 == Field 1
constrain v13 == Field 3
return
b1():
v4 = allocate -> &mut Field
store Field 1 at v4
jmp b3(v4, v4, v4)
}
";

Expand Down
6 changes: 3 additions & 3 deletions compiler/noirc_evaluator/src/ssa/opt/simplify_cfg.rs
Original file line number Diff line number Diff line change
Expand Up @@ -442,14 +442,14 @@ mod test {
store Field 0 at v1
v3 = not v0
jmpif v0 then: b2, else: b1
b1():
store Field 2 at v1
jmp b2()
b2():
v5 = load v1 -> Field
v6 = eq v5, Field 2
constrain v5 == Field 2
return
b1():
store Field 2 at v1
jmp b2()
}";
assert_normalized_ssa_equals(ssa.simplify_cfg(), expected);
}
Expand Down
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