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fix : removed parameters to deal with clockResetPhase functionality a…
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…nd replaced with a user function.
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maij committed Mar 13, 2017
1 parent 0c3bb59 commit 0d7892a
Showing 1 changed file with 11 additions and 27 deletions.
38 changes: 11 additions & 27 deletions qcodes/instrument_drivers/Signadyne/signadyne_common/SD_DIG.py
Original file line number Diff line number Diff line change
Expand Up @@ -98,33 +98,6 @@ def __init__(self, **kwargs):
docstring='The frequency of internal CLKsys in Hz'
)

# for clockResetPhase
self.add_parameter(
'trigger_behaviour',
label='Trigger behaviour for resetting CLKsys phase',
vals=Ints(),
set_cmd=None,
get_cmd=None,
docstring='The trigger behaviour for resetting CLKsys phase'
)

self.add_parameter(
'PXI_trigger',
label='PXI trigger for clockResetPhase',
vals=Ints(),
set_cmd=None,
get_cmd=None,
docstring='The PXI trigger which resets CLKsys'
)

self.add_parameter(
'skew',
label='Skew between PXI_CLK10 and CLKsync',
vals=Ints(),
set_cmd=None,
get_cmd=None,
docstring='The skew between PXI_CLK10 and CLKsync in multiples of 10 ns'
)

for n in range(n_channels):

Expand Down Expand Up @@ -353,6 +326,17 @@ def DAQ_flush_multiple(self, DAQ):
pass


def clock_reset_phase(self, trigger_behaviour, trigger_source, skew = 0.0):
""" Reset the clock phase between CLKsync and CLKsys
Args:
trigger_behaviour (int) :
trigger_source (int) : the PXI trigger number
[skew] (double) : the skew between PXI_CLK10 and CLKsync in multiples of 10ns
"""
self.SD_AIN.clockResetPhase(trigger_behaviour, trigger_source, skew)

#######################################################
### Functions used internally to set/get parameters ###
#######################################################
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