Add a --pgm tool option to stop build stage from automatically progra…

…mming (#392) Add --pgm flag to tools with programming capabilities
olofk · Nov 21, 2023 · 2bf3994 · 2bf3994
1 parent 2862825
commit 2bf3994
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Showing 3 changed files with 21 additions and 12 deletions.
diff --git a/edalize/ise.py b/edalize/ise.py
@@ -94,6 +94,11 @@ def get_doc(cls, api_ver):
                         "type": "Integer",
                         "desc": "Specifies the FPGA's device number in the JTAG chain, starting at 1",
                     },
+                    {
+                        "name": "pgm",
+                        "type": "String",
+                        "desc": "Programming tool. Default is 'none', set to 'ise' to program the FPGA in the run stage.",
+                    },
                 ],
             }
 
@@ -188,6 +193,8 @@ def _write_tcl_file(self):
         tcl_file.close()
 
     def run_main(self):
+        if ("pgm" not in self.tool_options) or (self.tool_options["pgm"] != "ise"):
+            return
         pgm_file_name = os.path.join(self.work_root, self.name + ".pgm")
         self._write_pgm_file(pgm_file_name)
         self._run_tool("impact", ["-batch", pgm_file_name])

diff --git a/edalize/quartus.py b/edalize/quartus.py
@@ -58,6 +58,11 @@ def get_doc(cls, api_ver):
                         "type": "String",
                         "desc": "P&R tool. Allowed values are quartus (default), dse (to run Design Space Explorer) and none (to just run synthesis)",
                     },
+                    {
+                        "name": "pgm",
+                        "type": "String",
+                        "desc": "Programming tool. Default is 'none', set to 'quartus' to program the FPGA in the run stage.",
+                    },
                 ],
                 "lists": [
                     {
@@ -272,13 +277,8 @@ def run_main(self):
         args += ["-o"]
         args += ["p;" + self.name.replace(".", "_") + ".sof"]
 
-        if "pnr" in self.tool_options:
-            if self.tool_options["pnr"] == "quartus":
-                pass
-            elif self.tool_options["pnr"] == "dse":
-                return
-            elif self.tool_options["pnr"] == "none":
-                return
+        if ("pgm" not in self.tool_options) or (self.tool_options["pgm"] != "quartus"):
+            return
 
         if "board_device_index" in self.tool_options:
             args[-1] += "@" + self.tool_options["board_device_index"]

diff --git a/edalize/vivado.py b/edalize/vivado.py
@@ -61,6 +61,11 @@ def get_doc(cls, api_ver):
                         "type": "String",
                         "desc": "P&R tool. Allowed values are vivado (default) and none (to just run synthesis)",
                     },
+                    {
+                        "name": "pgm",
+                        "type": "String",
+                        "desc": "Programming tool. Default is none, set to 'vivado' to program the FPGA in the run stage.",
+                    },
                     {
                         "name": "jobs",
                         "type": "Integer",
@@ -115,11 +120,8 @@ def run_main(self):
         correct FPGA board and then downloads the bitstream. The tcl script is then
         executed in Vivado's batch mode.
         """
-        if "pnr" in self.tool_options:
-            if self.tool_options["pnr"] == "vivado":
-                pass
-            elif self.tool_options["pnr"] == "none":
-                return
+        if ("pgm" not in self.tool_options) or (self.tool_options["pgm"] != "vivado"):
+            return
 
         self._run_tool("make", ["pgm"])