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Feature Request: Use of a gernic board under yosys
enhancement
New feature or request
#28
opened Nov 20, 2024 by
swittlich
An infinite amount of instances of the Settings Menu can be openend
#27
opened Nov 20, 2024 by
Flojo101
Reliable Node Extractor for VHDL/Verilog
enhancement
New feature or request
help wanted
Extra attention is needed
#24
opened Nov 9, 2024 by
HendrikMennen
Associate Log Messages with Projects
enhancement
New feature or request
#22
opened Oct 30, 2024 by
HendrikMennen
Define CompileExclude / Testbench as pattern in .fpgaproj file
enhancement
New feature or request
#16
opened Oct 2, 2024 by
HendrikMennen
SVG generation with one click
enhancement
New feature or request
#9
opened Jul 25, 2024 by
std-rubic
Add GHW, FST Parser
enhancement
New feature or request
help wanted
Extra attention is needed
#4
opened Jul 16, 2024 by
HendrikMennen
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