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Dyn project #1

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4de58eb
[DSE][NFC] Add nounwind attribute to match test intent
Oct 3, 2022
3771310
[ConstraintElimination] Convert to unsigned Pred if possible.
fhahn Oct 7, 2022
d85f6e5
[mlir][llvmir] Import intrinsics with attributes from LLVMIR.
gysit Oct 7, 2022
75358f0
[AArch64] Lower multiplication by a constant int to madd
vfdff Oct 7, 2022
317b558
Revert "[lld/mac] Port typo correction for undefined symbols from ELF…
zmodem Oct 7, 2022
b0ac5d7
[mlir][Bazel] Port d85f6e5d57f38f0cbbc756484e3a93ae89b11195
akuegel Oct 7, 2022
14e2592
[clang][CodeGen] Use poison instead of undef as placeholder in ARM bu…
ManuelJBrito Oct 7, 2022
4627cef
[OpenMP][OMPIRBuilder] Migrate emitOffloadingArraysArgument from clang
jsjodin Sep 29, 2022
39db5e1
[CodeGen] Convert tests to opaque pointers (NFC)
nikic Oct 7, 2022
551a242
[flang] Allow fir.class in AnyRefOrBox
clementval Oct 7, 2022
d779356
[SourceManager] Fix the incorrect counting stats in getFileIDLoaded.
hokein Oct 7, 2022
a4afa2b
Revert "Thread safety analysis: Support copy-elided production of sco…
zmodem Oct 7, 2022
5a42c90
[clang] Make variables of undeduced types to have dependent alignment
ArcsinX Oct 7, 2022
e3a9e31
[MachineInstr] Use unsigned int for opcode (NFC)
cdevadas Oct 4, 2022
fd7b0ee
[AMDGPU][MC][GFX11] Add VOPD VGPR bank access validation
dpreobra Oct 7, 2022
a290f3c
[OpenMP] Convert tests to opaque pointers (NFC)
nikic Oct 7, 2022
b5b4a07
[OpenMP][OMPIRBuilder] Remove calls to dump in test
jsjodin Oct 7, 2022
1d1c755
[AMDGPU][GFX11][NFC] Refactor VOPD handling in codegen
dpreobra Oct 7, 2022
853df5e
[Concepts] Fix friend duplicate detection when referencing containing…
Oct 7, 2022
8f8e4e3
[AMDGPU][MC][GFX11] Correct v_fmac_.*_e64_dpp
dpreobra Oct 7, 2022
3f3018b
[SimplifyLibCalls] Pre-commit test case showing bug with wide char su…
bjope Oct 4, 2022
01e1f32
[ValueTracking][SimplifyLibCalls] Fix bug in getConstantDataArrayInfo…
bjope Oct 4, 2022
8ee529a
[test][ExpandMemCmp] Convert test cases to opaque pointers. NFC
bjope Oct 7, 2022
40e353d
[OpenMP] Convert more tests to opaque pointers (NFC)
nikic Oct 7, 2022
edbde15
Fix typos - show in the binary
sylvestre Oct 7, 2022
0946e10
[mlir][doc] clarify (ir)recoverable failures in transform dialect
ftynse Oct 7, 2022
bb46022
[CMake] Small fix to HLSL header install paths
llvm-beanz Oct 7, 2022
107ee26
[AMDGPU] Disable bool range metadata to workaround backend issue
yxsamliu Sep 6, 2022
e838c06
[Flang] Use the ultimate symbol in a DeallocateStmt check
kiranchandramohan Oct 7, 2022
3b652fc
[analyzer] Fix static code analysis concerns
smanna12 Oct 7, 2022
9e93143
[SCEV] Support clearing Block/LoopDispositions for a single value.
fhahn Oct 7, 2022
1bddb0f
[Libomptarget] Clean up DeviceRTL CMake and remove unused flags
jhuber6 Oct 7, 2022
b6676f3
[LICM] Add test for single thread model promotion (NFC)
nikic Oct 7, 2022
eb26baf
Fix test bool-range.cu
yxsamliu Oct 7, 2022
473210a
[Hexagon] Constify member refererence, NFC
Sep 27, 2022
2216d8f
[Hexagon] Replace llvm::Optional with std::optional, NFC
Sep 28, 2022
7f90597
[AMDGPU] Fix a warning
kazutakahirata Oct 7, 2022
f53d60e
[InstCombine] add tests for udiv with shift-left divisor; NFC
rotateright Oct 6, 2022
68f267d
[InstCombine] add tests for udiv with common factor; NFC
rotateright Oct 6, 2022
bdfefac
[InstCombine] refactor sdiv by (negative) power-of-2 folds; NFCI
rotateright Oct 7, 2022
d376b26
[Hexagon] Make HexagonSubtarget::isHVXVectorType take EVT instead of MVT
Oct 6, 2022
06019b8
[Hexagon] Add default parameter to HexagonVectorCombine::getIntTy, NFC
Oct 6, 2022
af664e4
[mlir][Transform] Add a transform.split_handles operation and fix gen…
nicolasvasilache Oct 7, 2022
ad1efb5
[mlir][Linalg] Retire LinalgStrategyDecomposePass and filter-based pa…
nicolasvasilache Oct 7, 2022
9033e57
[mlir][doc] Remove trailing whitespace (NFC)
jpienaar Oct 7, 2022
e492cdc
[Hexagon] Add couple of helper functions in HexagonVectorCombine
Oct 6, 2022
d184045
[Hexagon] Formatting changes, NFC
Oct 6, 2022
defe072
[Libomptarget] Remove debug definitions DeviceRTL's CMake
jhuber6 Oct 7, 2022
b5b79eb
[mlir][Linalg] Retire LinalgStrategyPadPass and filter-based pattern.
nicolasvasilache Oct 7, 2022
901f555
[llvm-profdata] Add --output-format option
ellishg Oct 4, 2022
70fb7bb
[InstrProf][llvm-profdata] Dump profile correlation data as YAML
ellishg Oct 7, 2022
92f698f
Revert "[SCEV] Support clearing Block/LoopDispositions for a single v…
fhahn Oct 7, 2022
49acab3
[flang][nfc] Relocate a few driver tests
banach-space Jul 27, 2022
9520fca
[InstCombine] add tests for sdiv-of-shl-1; NFC
rotateright Oct 7, 2022
5e89662
[InstCombine] add tests for ashr exact; NFC
rotateright Oct 7, 2022
3e6767e
[InstCombine] propagate 'exact' when converting ashr to lshr
rotateright Oct 7, 2022
4cdfab1
[Clang][OpenMP] Add one missing form of atomic compare capture
shiltian Oct 7, 2022
395d261
[NFC] Remove trailing white space in openmp/libomptarget/src/CMakeLis…
shiltian Oct 7, 2022
6a6f10f
[Docs] [HLSL] Add note about PCH support
python3kgae Oct 5, 2022
a9f95b7
[libc] add strerror_r function
michaelrj-google Oct 4, 2022
c384b20
[opt] Remove temporary legacy pass name translations
aeubanks Oct 7, 2022
bb4f0af
[clangd] Fix buildbots after d1f13c54f172875d9a14c46c09afb1f22d78cdf8
kadircet Oct 7, 2022
07793f9
[libc] add strsignal and refactor message mapping
michaelrj-google Oct 5, 2022
3e097fa
[BOLT][NFC] Remove text section assertion
maksfb Oct 3, 2022
c683e28
[BOLT] Properly set _end symbol
maksfb Oct 3, 2022
0b213c9
[BOLT] Fix writing out unmarked .eh_frame section
maksfb Oct 4, 2022
5fca9c5
[BOLT] Change order of new sections
maksfb Oct 5, 2022
07c0a41
[libc] add printf decimal float conversion
michaelrj-google Jul 12, 2022
696b8ea
[BOLT] Testcase to repro dyn reloc bug
rafaelauler Oct 7, 2022
ea607d0
[llvm-profdata] Rename show flag to --show-format
ellishg Oct 7, 2022
d3d8465
[opt] Stop treating alias analysis specially when translating legacy …
aeubanks Oct 7, 2022
cb66e12
Remove PlaceSafepoints pass
preames Oct 6, 2022
37122c7
[opt] Remove -passes=asan-pipeline
aeubanks Oct 7, 2022
ec86e9a
[LoopUnroll] Add test for crash exposed by 9e931439.
fhahn Oct 7, 2022
fe50eac
[llvm-reduce] Fix di-metadata pass test failures
ormris Oct 7, 2022
19ad1cd
Recommit "[SCEV] Support clearing Block/LoopDispositions for a single…
fhahn Oct 7, 2022
d227029
[ConstraintElimination] Add test for regression after 3771310eede.
fhahn Oct 7, 2022
d32df0f
[mlir][arith] Expose dedicated API for expanding ceil/floor division
antiagainst Oct 7, 2022
3a25b21
llvm-reduce: Fix missing C++ mode comments
arsenm Oct 5, 2022
023f24d
llvm-reduce: Use -abort-on-invalid-reduction in a test
arsenm Oct 4, 2022
0a15942
llvm-reduce: Fix invalid reduction for phis with repeat inputs
arsenm Oct 6, 2022
7721cba
llvm-reduce: Fix another invalid reduction with repeated input phis
arsenm Oct 6, 2022
74ef03d
AMDGPU: Update SlotIndexes independently of LiveIntervals
arsenm Sep 15, 2022
0edff6f
[Clang] Support constexpr builtin fmax
Izaron Sep 21, 2022
13ac102
[LoopSimplifyCFG] Invalidate SCEV dispositions.
fhahn Oct 7, 2022
c966da3
[opt] Remove legacy -print-dom-info pass
aeubanks Oct 7, 2022
f3a2cbc
Refactored CUDA version housekeeping to use less boilerplate.
Artem-B Oct 5, 2022
9a01cca
Add support for CUDA-11.8 and sm_{87,89,90} GPUs.
Artem-B Aug 10, 2022
27ef42b
Fix warnings in build done by clang-based compiler
Oct 7, 2022
c585a44
[Clang] Use C++17 in constant-builtins-fmax.cpp test
Izaron Oct 7, 2022
978f11c
[BOLT][TEST] Fix section order test
maksfb Oct 7, 2022
f3a928e
[opt] Don't translate legacy -analysis flag to require<analysis>
aeubanks Oct 7, 2022
7c57a37
[JITLink][aarch64] Fix typo in error message.
lhames Oct 7, 2022
42cb2f8
[GlobalISel] Mark mi_match as nodiscard
Oct 7, 2022
62ea6c5
[DAGCombine] Deduplicate addcarry node using commutativity.
deadalnix Oct 7, 2022
09d84e0
[Hexagon] Implement helper to get intrinsic for instruction opcode
Oct 7, 2022
7c7f331
[libc][nfc] fix comment in clock_gettime
michaelrj-google Oct 7, 2022
47b1623
[llvm-reduce] Fail verifier less when removing debug metadata
aeubanks Oct 7, 2022
ec96aea
[libFuzzer] update the libFuzzer docs to reflect the current state.
kcc Oct 5, 2022
aa8ab5b
[libc] Document which date funcs are needed/done
kaladron Oct 8, 2022
9f67047
[VP][RISCV] Add vp.smax/smin/umax/umin intrinsics
topperc Oct 7, 2022
f749b2d
[RISCV] Fix incorrect parenthese placement in comment. NFC
topperc Oct 8, 2022
f0c93fd
[mlir][vector] Merge accumulator/result transpose into contract
antiagainst Oct 8, 2022
9e80add
[memprof] dump memprof profile when receive deadly signals
Enna1 Oct 8, 2022
45b9c6b
[GlobalISel] Add commutative matchers for compares.
Oct 7, 2022
730ee65
[LoongArch] Set correct encodings for DWARF exception handling
wangleiat Oct 6, 2022
5e5d214
BareMetal: detect usr/include/c++/v1 path in sysroot
m-gupta Sep 22, 2022
79ed24e
[clangd] Enable standard library index by default.
sam-mccall Sep 15, 2022
3b276a0
[ARM64EC][clang-cl] Add arm64EC test; NFC
bcl5980 Oct 8, 2022
f4ccb57
[LoongArch] Do not assert value type in isFPImmLegal
gonglingqin Oct 8, 2022
566c277
[X86] Remove AVX512VP2INTERSECT from Sapphire Rapids.
FreddyLeaf Oct 8, 2022
9974ed8
[C++20] [Modules] Remove assertion of current module when acting on i…
ChuanqiXu9 Oct 8, 2022
0c4f0bf
[C++20] [Modules] Only allow redeclarations in partitions if they are…
ChuanqiXu9 Oct 8, 2022
9d31d1c
[ConstraintElimination] Use logic from 3771310eed for queries only.
fhahn Oct 8, 2022
a8fbd11
[clang-tidy] Ignore concepts in `misc-redundant-expression`
Izaron Sep 14, 2022
e17ec8e
[libc++] Make charconv require C++17 or later.
mordante Sep 2, 2022
fe15290
[InstCombine] fold exact sdiv to ashr
rotateright Oct 8, 2022
68d4dbc
Revert "[InstCombine] fold exact sdiv to ashr"
rotateright Oct 8, 2022
ebda066
[InstCombine] add test for sdiv with shl; NFC
rotateright Oct 8, 2022
eccb9a7
[InstCombine] fold exact sdiv to ashr (2nd try)
rotateright Oct 8, 2022
be858bd
[ConstraintElimination] Remove unused function (NFC).
fhahn Oct 8, 2022
73950f2
[LV] Replace check with assert for reduction resume values (NFC).
fhahn Oct 8, 2022
e0136a6
[ConstraintElimination] Support chained GEPs with constant offsets.
fhahn Oct 8, 2022
2bb34cc
[clangd] FindTarget: UsingEnumDecl is not an alias
sam-mccall Oct 8, 2022
39532ea
[RISCV] Add signext attribute to i32 arguments in some tests. NFC
topperc Oct 8, 2022
4fbe335
[LTO] Make local linkage GlobalValue in non-prevailing COMDAT availab…
MaskRay Oct 8, 2022
30c7c42
Apply clang-tidy fixes for performance-unnecessary-value-param in IRC…
joker-eph Oct 6, 2022
a76bd4f
Apply clang-tidy fixes for llvm-else-after-return in TosaToLinalg.cpp…
joker-eph Oct 6, 2022
1ae4051
[ConstraintElimination] Add tests for chained GEPs without inbounds.
fhahn Oct 8, 2022
3a44435
Add myself to CREDITS.TXT + CODE_OWNERS.TXT
RKSimon Oct 8, 2022
7b85e76
[PGO] Consider parent context when weighing branches with likelyhood.
Sep 22, 2022
5699692
[Support] Add fast path for StringRef::find with needle of length 2.
ishitatsuyuki Oct 9, 2022
313c93a
Add myself to CREDITS.TXT + CODE_OWNERS.TXT
phoebewang Oct 9, 2022
b0c2f90
[RISCV] Merge more rv32/rv64 vector intrinsic tests that contain the …
topperc Oct 8, 2022
fc1f631
Remove myself as X86 Backend owner.
topperc Oct 9, 2022
826693e
[CMake] Use libcxx-abi-* targets for in-tree sanitizer C++ ABI
petrhosek Sep 29, 2022
f204229
[lld-macho] Implement -ignore_auto_link
keith Oct 9, 2022
31327c2
[LoongArch] Don't merge FrameIndex accesses into [F]{LD,ST}X
xen0n Oct 9, 2022
bc5e969
[PowerPC] Add vector pair calling convention for AIX
orcguru Oct 9, 2022
b72a364
[C++20] [Coroutines] Exit early if we found co_await appears in
ChuanqiXu9 Oct 9, 2022
a2c6a11
[libc++][ranges]implement `std::views::take_while`
huixie90 Sep 30, 2022
da064c9
[gn build] Port a2c6a1193f41
llvmgnsyncbot Oct 9, 2022
11a6e64
[ConstraintElim] Move logic to get constraint for solving to helper.
fhahn Oct 9, 2022
5593d36
[LoongArch] Expand fptrunc store from f64 to f32
gonglingqin Oct 9, 2022
ac21938
[clangd] Fix rename for symbol introduced by UsingDecl
tom-anders Oct 7, 2022
69e7727
[clang-format] Add support to remove unnecessary semicolons after fun…
mydeveloperday Oct 9, 2022
7329dc0
[RISCV][NFC] Fix unused variable warning.
Oct 6, 2022
eaf6e2f
[DSE] Relax constraint on isGuaranteedLoopInvariant
Oct 5, 2022
a40fdef
[ConstraintElimination] Add tests for GEPs with different source types.
fhahn Oct 9, 2022
fee8f56
[ConstraintElimination] Include index type scale.
fhahn Oct 9, 2022
4a37765
[AArch64][NFC] Precommit test case to show sub-optimal codegen for ad…
mingmingl-llvm Oct 4, 2022
159fb37
[AArch64] Swap 'lsl(val1,small-shmt)' to right hand side for AND(lsl(…
mingmingl-llvm Oct 4, 2022
92f26d4
Apply clang-tidy fixes for readability-identifier-naming in TosaToLin…
joker-eph Oct 6, 2022
0666e50
Apply clang-tidy fixes for modernize-use-equals-default in Bufferize.…
joker-eph Oct 6, 2022
50312ea
[tsan][go] Fix string equal operator
Oct 10, 2022
6b24bdb
[RISCV] Remove some vsetvli intrinsics under Zve32*.
topperc Oct 10, 2022
aedeb8d
[LLJIT] Default to EPCEHFrameRegistrar rather than InProcessEHFrameRe…
lhames Oct 10, 2022
d6c9b3c
[ORC] Relax assertions in SimpleRemoteEPCTransport.
lhames Oct 10, 2022
158ad80
[examples] Fix deprecated use of llvm::empty.
lhames Oct 10, 2022
a835b92
[RISCV] Use hasAllWUsers to recover XORI/ORI
ChunyuLiao Oct 9, 2022
0cf70a3
[flang] Allow conversion from boxed derived type to fir.class
clementval Oct 10, 2022
1ae33bf
[clang-tidy] Add cppcoreguidelines-avoid-do-while check
carlosgalvezp Aug 23, 2022
101799b
[gn build] Port 1ae33bf42680
llvmgnsyncbot Oct 10, 2022
2ae27dc
[mlir][Linalg] Use ConfinedAttr for dimensions of ReduceOp.
akuegel Oct 5, 2022
36b13eb
[AA] Remove deprecated ModRefInfo helpers (NFC)
nikic Oct 10, 2022
bc839b4
[Bindings] Remove go bindings
nikic Oct 7, 2022
874c032
[Attributor] Use ConstantFoldLoadFromConst()
nikic Oct 7, 2022
c3e073b
Extended Documentation of LLVM_TARGETS_TO_BUILD by listing all possib…
Oct 10, 2022
d48e630
[AArch64][SVE] Fix AArch64_SVE_VectorCall calling convention
MDevereau Sep 8, 2022
2f46f50
Add llvm-gsymutil to the Bazel build files.
sfc-gh-sgiesecke Oct 10, 2022
b3d4d9c
[LLDB] Complete set of char tests for static integral members
DavidSpickett Oct 6, 2022
a4561d9
[lldb][CPlusPlusLanguage] Respect the step-avoid-regex for functions …
Michael137 Oct 6, 2022
2343ad7
[AArch64] Add index check before lowerInterleavedStore() uses Shuffle…
DataCorrupted Oct 10, 2022
71b4bc1
Fix clang-tools-extra Sphinx build
AaronBallman Oct 10, 2022
3f36bdd
[PhaseOrdering] add test for sdiv with common factor; NFC
rotateright Oct 10, 2022
6876004
[InstCombine] add 'exact' to udiv test for more coverage; NFC
rotateright Oct 10, 2022
9cff471
[InstCombine] fold udiv with common factor
rotateright Oct 10, 2022
b494a56
[gn build] port bc839b4b4e27
nico Oct 10, 2022
7915027
[mlir][Linalg] Retire LinalgStrategyTileAndFusePass and filter-based …
nicolasvasilache Oct 10, 2022
6685e56
Disallow dereferencing of void* in C++.
Oct 4, 2022
4baa5ae
Possibly fix sphinx regression from 6685e56ceddf
Oct 10, 2022
c7545de
[mlir][Bazel] Fix for reviews.llvm.org/D135559
gflegar Oct 10, 2022
ebb258d
[AMDGPU] Make V_SAT_PK_U8_I16 a True16 Instruction
Sisyph Oct 7, 2022
deb82d4
Revert "[PGO] Make emitted symbols hidden"
abrachet Oct 10, 2022
b920407
[LICM] Disable thread-safety checks in single-thread model
shubhamnarlawar Oct 10, 2022
80e49f4
[ConstraintElimination] Bail out for GEPs with scalable vectors.
fhahn Oct 10, 2022
461c461
[mlir][sparse] Rename SparseTensorFile to SparseTensorReader.
bixia1 Oct 7, 2022
b62f5fb
[Clang][Sema] Narrow inline namespace filtration for unqualified frie…
troyj-gh Oct 10, 2022
ec32386
[Clang] Support constexpr builtin fmin
Izaron Oct 7, 2022
fd91e8f
[lldb][test] Skip TestStepAvoidsRegexp.py on Windows
Michael137 Oct 10, 2022
83c65fb
[mlir][linalg] Expose pattern to collapse generic op dimensions
ThomasRaoux Oct 7, 2022
4b6bd1c
[LoopSimplifyCFG] Clear SCEV dispositions when removing dead blocks.
fhahn Oct 10, 2022
b8a8c2d
Allow DynamicLoaderDarwinKernel to activate without binary
jasonmolenda Oct 10, 2022
9eb1185
Implement `getrandom` function for linux targets.
SchrodingerZhu Oct 10, 2022
d4facda
[TargetLowering][RISCV][X86] Support even divisors in expandDIVREMByC…
topperc Oct 10, 2022
9ced729
Repair a confusing standards reference; NFC
AaronBallman Oct 10, 2022
231fc00
[clang-format][docs][NFC] Fix invalid syntax in ShortLambdaStyle exam…
rymiel Oct 10, 2022
1aa06ae
[mlir][sparse] Removing DLL attributes from ExecutionEngine/SparseTen…
wrengr Oct 8, 2022
faea104
Fix a typo in the docs; NFC
AaronBallman Oct 10, 2022
438e591
[libc] Add implementation of pthread_atfork.
Oct 7, 2022
fb27fd5
Revert "[LTO] Make local linkage GlobalValue in non-prevailing COMDAT…
rupprecht Oct 10, 2022
6c49d5d
Fix unused variable warning from D134529
Oct 10, 2022
9d69c60
Fix a typo in the Release Notes; NFC
AaronBallman Oct 10, 2022
ac0fe5d
[mlir][linalg] Remove unused payload related OutOpOperand
raikonenfnu Oct 10, 2022
0fde0f4
[AMDGPU][NFC] Update DW_OP_LLVM_overlay documentation
t-tye Oct 4, 2022
e66cfb6
Update implementation status of P2468R2
usx95 Oct 10, 2022
6ace81d
[VectorCombine] add test with out-of-bounds insert/extract index; NFC
rotateright Oct 10, 2022
baab4aa
[VectorCombine] convert scalar fneg with insert/extract to vector fneg
rotateright Oct 10, 2022
ebb0be9
[ConstraintElimination] Regenerate check lines for test.
fhahn Oct 10, 2022
4b599fa
[SCEV] Verify block disposition cache.
fhahn Oct 10, 2022
2bb86b6
[clang] Mention -Werror changes revived for Clang 16
thesamesam Oct 9, 2022
0982db1
[Clang] reject bit-fields as instruction operands in Microsoft style …
tahonermann Oct 7, 2022
6b89e89
Reword diagnostics for style; NFC
AaronBallman Oct 10, 2022
d208bae
[mlir] Fix a warning
kazutakahirata Oct 10, 2022
277c382
[lld-macho] Flip ZERO_AR_DATE default
keith Oct 9, 2022
fa58926
[mlir][linalg] Remove redundant check on linalgOps to fix windows bui…
raikonenfnu Oct 10, 2022
8a7d499
[AMDGPU] Fix True16 patterns for cmp on GFX11
Sisyph Oct 10, 2022
98190d2
[NFC][3/n] Remove enable-new-pm from Inline tests
speryt Oct 10, 2022
52b8f3a
[LinkerWrapper] Fix failing linker wrapper save temps test
jhuber6 Oct 10, 2022
deb8f8a
[ARM] Add errors for MVE exclusive registers.
davemgreen Oct 10, 2022
2d10f81
[mlir][Vector] Introduce 'vector.mask' operation and MaskableOpInterface
dcaballe Oct 10, 2022
1ac525b
[libc] add sysconf with pagesize
michaelrj-google Sep 22, 2022
0121b1a
Revert "[TargetLowering][RISCV][X86] Support even divisors in expandD…
topperc Oct 10, 2022
7a3c9a8
[SPIRV] Fix call lowering of "anonymous" functions
michalpaszkowski Oct 6, 2022
e5fd507
[NFCI] More TypeCategoryImpl refactoring.
slackito Sep 22, 2022
8fc63d1
[mlir][sparse] fixed memory leak on sparse tensors
aartbik Oct 10, 2022
7639ba6
[libc] add isatty
michaelrj-google Oct 10, 2022
b8e7176
Revert "[gn build] Don't set LLVM_UNREACHABLE_OPTIMIZE when llvm_enab…
aeubanks Oct 10, 2022
707996e
[libc] handle case where /dev/tty doesn't exist
michaelrj-google Oct 10, 2022
4a95a64
[instcombine] (extelt (inselt Vec, Value, Index), Index) -> Value
dsandersllvm Oct 10, 2022
d325d2b
[mlir][tosa] Fix tosa::Select to linalg::generic indexingMaps bug
Oct 10, 2022
aec239c
[libc] reset errno in isatty tests
michaelrj-google Oct 10, 2022
a6abcfe
[libc] fix header list for x86_64
michaelrj-google Oct 10, 2022
2cfa92d
Add IRDL dialect
math-fehr Sep 21, 2022
94e74cf
Fix define name
math-fehr Sep 22, 2022
d1a2be1
Rename ConcreteTypeWrapper to CppTypeWrapper
math-fehr Sep 23, 2022
3fd12fc
Let users register IRDL files in mlir-opt
math-fehr Sep 26, 2022
bad7b18
Add IRDL to the dialects to emit
math-fehr Sep 26, 2022
f719b86
Add mlir-irdl-opt
math-fehr Sep 26, 2022
efd0fbb
Add IRDL tests
math-fehr Sep 26, 2022
6b80fea
[MLIR] [IRDL] Use symbols for DialectOp
math-fehr Dec 28, 2022
3909c31
Template IRDL constraints (#3)
Moxinilian Dec 30, 2022
82840c5
[mlir][irdl] Add missing isDeclaration method to Symbol
math-fehr Jan 2, 2023
b3a93e1
[mlir][irdl] Make IRDL Types Symbols
math-fehr Jan 2, 2023
18b3f29
[mlir][irdl] Use symobls for Type and Operation definitions
math-fehr Jan 2, 2023
edf27e1
[mlir][irdl] Remove (parse|print)KeywordOrString
math-fehr Jan 2, 2023
25dd1b3
Add TypeDefRefAttr for handling dyn and static types the same way
math-fehr Jan 6, 2023
931746f
Use TypeDefRef in TypeParamsConstraintAttr
math-fehr Jan 6, 2023
98b05a3
[mlir][irdl] Merge dynamic and static constraints
math-fehr Jan 6, 2023
efde8ef
Begin header documentation for IRDL dialect (#4)
Moxinilian Jan 11, 2023
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3 changes: 3 additions & 0 deletions bolt/include/bolt/Core/BinaryContext.h
Original file line number Diff line number Diff line change
Expand Up @@ -615,6 +615,9 @@ class BinaryContext {
/// Number of functions with profile information
uint64_t NumProfiledFuncs{0};

/// Number of functions with stale profile information
uint64_t NumStaleProfileFuncs{0};

/// Number of objects in profile whose profile was ignored.
uint64_t NumUnusedProfiledObjects{0};

Expand Down
47 changes: 38 additions & 9 deletions bolt/include/bolt/Core/BinarySection.h
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,9 @@ class BinaryData;
class BinarySection {
friend class BinaryContext;

/// Count the number of sections created.
static uint64_t Count;

BinaryContext &BC; // Owning BinaryContext
std::string Name; // Section name
const SectionRef Section; // SectionRef (may be null)
Expand Down Expand Up @@ -86,6 +89,7 @@ class BinarySection {
uint64_t OutputSize{0}; // Section size in the rewritten binary.
uint64_t OutputFileOffset{0}; // File offset in the rewritten binary file.
StringRef OutputContents; // Rewritten section contents.
const uint64_t SectionNumber; // Order in which the section was created.
unsigned SectionID{-1u}; // Unique ID used for address mapping.
// Set by ExecutableFileMemoryManager.
uint32_t Index{0}; // Section index in the output file.
Expand Down Expand Up @@ -147,13 +151,14 @@ class BinarySection {
Size(Section.getSize()), Alignment(Section.getAlignment()),
ELFType(Section.getELFType()), ELFFlags(Section.getELFFlags()),
Relocations(Section.Relocations),
PendingRelocations(Section.PendingRelocations), OutputName(Name) {}
PendingRelocations(Section.PendingRelocations), OutputName(Name),
SectionNumber(++Count) {}

BinarySection(BinaryContext &BC, SectionRef Section)
: BC(BC), Name(getName(Section)), Section(Section),
Contents(getContents(Section)), Address(Section.getAddress()),
Size(Section.getSize()), Alignment(Section.getAlignment()),
OutputName(Name) {
OutputName(Name), SectionNumber(++Count) {
if (isELF()) {
ELFType = ELFSectionRef(Section).getType();
ELFFlags = ELFSectionRef(Section).getFlags();
Expand All @@ -173,7 +178,7 @@ class BinarySection {
Contents(reinterpret_cast<const char *>(Data), Data ? Size : 0),
Address(0), Size(Size), Alignment(Alignment), ELFType(ELFType),
ELFFlags(ELFFlags), IsFinalized(true), OutputName(Name),
OutputSize(Size), OutputContents(Contents) {
OutputSize(Size), OutputContents(Contents), SectionNumber(++Count) {
assert(Alignment > 0 && "section alignment must be > 0");
}

Expand Down Expand Up @@ -207,10 +212,34 @@ class BinarySection {

// Order sections by their immutable properties.
bool operator<(const BinarySection &Other) const {
return (getAddress() < Other.getAddress() ||
(getAddress() == Other.getAddress() &&
(getSize() < Other.getSize() ||
(getSize() == Other.getSize() && getName() < Other.getName()))));
// Allocatable before non-allocatable.
if (isAllocatable() != Other.isAllocatable())
return isAllocatable() > Other.isAllocatable();

// Input sections take precedence.
if (hasSectionRef() != Other.hasSectionRef())
return hasSectionRef() > Other.hasSectionRef();

// Compare allocatable input sections by their address.
if (getAddress() != Other.getAddress())
return getAddress() < Other.getAddress();
if (getAddress() && getSize() != Other.getSize())
return getSize() < Other.getSize();

// Code before data.
if (isText() != Other.isText())
return isText() > Other.isText();

// Read-only before writable.
if (isReadOnly() != Other.isReadOnly())
return isReadOnly() > Other.isReadOnly();

// BSS at the end.
if (isBSS() != Other.isBSS())
return isBSS() < Other.isBSS();

// Otherwise, preserve the order of creation.
return SectionNumber < Other.SectionNumber;
}

///
Expand All @@ -228,13 +257,13 @@ class BinarySection {
bool isText() const {
if (isELF())
return (ELFFlags & ELF::SHF_EXECINSTR);
return getSectionRef().isText();
return hasSectionRef() && getSectionRef().isText();
}
bool isData() const {
if (isELF())
return (ELFType == ELF::SHT_PROGBITS &&
(ELFFlags & (ELF::SHF_ALLOC | ELF::SHF_WRITE)));
return getSectionRef().isData();
return hasSectionRef() && getSectionRef().isData();
}
bool isBSS() const {
return (ELFType == ELF::SHT_NOBITS &&
Expand Down
4 changes: 2 additions & 2 deletions bolt/include/bolt/Core/DebugData.h
Original file line number Diff line number Diff line change
Expand Up @@ -330,8 +330,8 @@ class DebugAddrWriter {
protected:
class AddressForDWOCU {
public:
AddressToIndexMap::iterator find(uint64_t Adddress) {
return AddressToIndex.find(Adddress);
AddressToIndexMap::iterator find(uint64_t Address) {
return AddressToIndex.find(Address);
}
AddressToIndexMap::iterator end() { return AddressToIndex.end(); }
AddressToIndexMap::iterator begin() { return AddressToIndex.begin(); }
Expand Down
2 changes: 1 addition & 1 deletion bolt/include/bolt/Core/MCPlusBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -1431,7 +1431,7 @@ class MCPlusBuilder {
return false;
}

/// Store \p Target absolute adddress to \p RegName
/// Store \p Target absolute address to \p RegName
virtual InstructionListType materializeAddress(const MCSymbol *Target,
MCContext *Ctx,
MCPhysReg RegName,
Expand Down
4 changes: 4 additions & 0 deletions bolt/include/bolt/Profile/DataAggregator.h
Original file line number Diff line number Diff line change
Expand Up @@ -311,6 +311,10 @@ class DataAggregator : public DataReader {
/// Consume the entire line
void consumeRestOfLine();

/// True if the next token in the parsing buffer is a new line, but don't
/// consume it (peek only).
bool checkNewLine();

/// Parse a single LBR entry as output by perf script -Fbrstack
ErrorOr<LBREntry> parseLBREntry();

Expand Down
2 changes: 0 additions & 2 deletions bolt/lib/Core/BinaryEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -211,8 +211,6 @@ void BinaryEmitter::emitAll(StringRef OrgSecPrefix) {
}

emitDataSections(OrgSecPrefix);

Streamer.emitLabel(BC.Ctx->getOrCreateSymbol("_end"));
}

void BinaryEmitter::emitFunctions() {
Expand Down
2 changes: 2 additions & 0 deletions bolt/lib/Core/BinarySection.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,8 @@ extern cl::opt<bool> PrintRelocations;
extern cl::opt<bool> HotData;
} // namespace opts

uint64_t BinarySection::Count = 0;

bool BinarySection::isELF() const { return BC.isELF(); }

bool BinarySection::isMachO() const { return BC.isMachO(); }
Expand Down
9 changes: 7 additions & 2 deletions bolt/lib/Passes/BinaryPasses.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -417,10 +417,14 @@ void ReorderBasicBlocks::runOnFunctions(BinaryContext &BC) {
ParallelUtilities::runOnEachFunction(
BC, ParallelUtilities::SchedulingPolicy::SP_BB_LINEAR, WorkFun, SkipFunc,
"ReorderBasicBlocks");
const size_t NumAllProfiledFunctions =
BC.NumProfiledFuncs + BC.NumStaleProfileFuncs;

outs() << "BOLT-INFO: basic block reordering modified layout of "
<< format("%zu (%.2lf%%) functions\n",
<< format("%zu functions (%.2lf%% of profiled, %.2lf%% of total)\n",
ModifiedFuncCount.load(std::memory_order_relaxed),
100.0 * ModifiedFuncCount.load(std::memory_order_relaxed) /
NumAllProfiledFunctions,
100.0 * ModifiedFuncCount.load(std::memory_order_relaxed) /
BC.getBinaryFunctions().size());

Expand Down Expand Up @@ -890,7 +894,7 @@ uint64_t SimplifyConditionalTailCalls::fixTailCalls(BinaryFunction &BF) {

// Annotate it, so "isCall" returns true for this jcc
MIB->setConditionalTailCall(*CondBranch);
// Add info abount the conditional tail call frequency, otherwise this
// Add info about the conditional tail call frequency, otherwise this
// info will be lost when we delete the associated BranchInfo entry
auto &CTCAnnotation =
MIB->getOrCreateAnnotationAs<uint64_t>(*CondBranch, "CTCTakenCount");
Expand Down Expand Up @@ -1383,6 +1387,7 @@ void PrintProgramStats::runOnFunctions(BinaryContext &BC) {
}
}
BC.NumProfiledFuncs = ProfiledFunctions.size();
BC.NumStaleProfileFuncs = NumStaleProfileFunctions;

const size_t NumAllProfiledFunctions =
ProfiledFunctions.size() + NumStaleProfileFunctions;
Expand Down
12 changes: 6 additions & 6 deletions bolt/lib/Passes/IndirectCallPromotion.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -416,15 +416,15 @@ IndirectCallPromotion::maybeGetHotJumpTableTargets(BinaryBasicBlock &BB,

++TotalIndexBasedCandidates;

auto ErrorOrMemAccesssProfile =
auto ErrorOrMemAccessProfile =
BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(*MemLocInstr,
"MemoryAccessProfile");
if (!ErrorOrMemAccesssProfile) {
if (!ErrorOrMemAccessProfile) {
DEBUG_VERBOSE(1, dbgs()
<< "BOLT-INFO: ICP no memory profiling data found\n");
return JumpTableInfoType();
}
MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccesssProfile.get();
MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccessProfile.get();

uint64_t ArrayStart;
if (DispExpr) {
Expand Down Expand Up @@ -670,15 +670,15 @@ IndirectCallPromotion::MethodInfoType IndirectCallPromotion::maybeGetVtableSyms(
});

// Try to get value profiling data for the method load instruction.
auto ErrorOrMemAccesssProfile =
auto ErrorOrMemAccessProfile =
BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(*MethodFetchInsns.back(),
"MemoryAccessProfile");
if (!ErrorOrMemAccesssProfile) {
if (!ErrorOrMemAccessProfile) {
DEBUG_VERBOSE(1, dbgs()
<< "BOLT-INFO: ICP no memory profiling data found\n");
return MethodInfoType();
}
MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccesssProfile.get();
MemoryAccessProfile &MemAccessProfile = ErrorOrMemAccessProfile.get();

// Find the vtable that each method belongs to.
std::map<const MCSymbol *, uint64_t> MethodToVtable;
Expand Down
12 changes: 6 additions & 6 deletions bolt/lib/Passes/ReorderData.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -182,14 +182,14 @@ void ReorderData::assignMemData(BinaryContext &BC) {

for (const BinaryBasicBlock &BB : BF) {
for (const MCInst &Inst : BB) {
auto ErrorOrMemAccesssProfile =
auto ErrorOrMemAccessProfile =
BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(
Inst, "MemoryAccessProfile");
if (!ErrorOrMemAccesssProfile)
if (!ErrorOrMemAccessProfile)
continue;

const MemoryAccessProfile &MemAccessProfile =
ErrorOrMemAccesssProfile.get();
ErrorOrMemAccessProfile.get();
for (const AddressAccess &AccessInfo :
MemAccessProfile.AddressAccessInfo) {
if (BinaryData *BD = AccessInfo.MemoryObject) {
Expand Down Expand Up @@ -238,14 +238,14 @@ ReorderData::sortedByFunc(BinaryContext &BC, const BinarySection &Section,
continue;

for (const MCInst &Inst : BB) {
auto ErrorOrMemAccesssProfile =
auto ErrorOrMemAccessProfile =
BC.MIB->tryGetAnnotationAs<MemoryAccessProfile>(
Inst, "MemoryAccessProfile");
if (!ErrorOrMemAccesssProfile)
if (!ErrorOrMemAccessProfile)
continue;

const MemoryAccessProfile &MemAccessProfile =
ErrorOrMemAccesssProfile.get();
ErrorOrMemAccessProfile.get();
for (const AddressAccess &AccessInfo :
MemAccessProfile.AddressAccessInfo) {
if (AccessInfo.MemoryObject)
Expand Down
24 changes: 11 additions & 13 deletions bolt/lib/Passes/RetpolineInsertion.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -44,19 +44,17 @@ RetpolineLfence("retpoline-lfence",
cl::Hidden,
cl::cat(BoltCategory));

cl::opt<RetpolineInsertion::AvailabilityOptions>
R11Availability("r11-availability",
cl::desc("determine the availablity of r11 before indirect branches"),
cl::init(RetpolineInsertion::AvailabilityOptions::NEVER),
cl::values(
clEnumValN(RetpolineInsertion::AvailabilityOptions::NEVER,
"never", "r11 not available"),
clEnumValN(RetpolineInsertion::AvailabilityOptions::ALWAYS,
"always", "r11 avaialable before calls and jumps"),
clEnumValN(RetpolineInsertion::AvailabilityOptions::ABI,
"abi", "r11 avaialable before calls but not before jumps")),
cl::ZeroOrMore,
cl::cat(BoltCategory));
cl::opt<RetpolineInsertion::AvailabilityOptions> R11Availability(
"r11-availability",
cl::desc("determine the availability of r11 before indirect branches"),
cl::init(RetpolineInsertion::AvailabilityOptions::NEVER),
cl::values(clEnumValN(RetpolineInsertion::AvailabilityOptions::NEVER,
"never", "r11 not available"),
clEnumValN(RetpolineInsertion::AvailabilityOptions::ALWAYS,
"always", "r11 avaialable before calls and jumps"),
clEnumValN(RetpolineInsertion::AvailabilityOptions::ABI, "abi",
"r11 avaialable before calls but not before jumps")),
cl::ZeroOrMore, cl::cat(BoltCategory));

} // namespace opts

Expand Down
7 changes: 6 additions & 1 deletion bolt/lib/Profile/DataAggregator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1056,6 +1056,10 @@ void DataAggregator::consumeRestOfLine() {
Line += 1;
}

bool DataAggregator::checkNewLine() {
return ParsingBuf[0] == '\n';
}

ErrorOr<DataAggregator::PerfBranchSample> DataAggregator::parseBranchSample() {
PerfBranchSample Res;

Expand Down Expand Up @@ -2147,7 +2151,8 @@ DataAggregator::parseNameBuildIDPair() {

// If one of the strings is missing, don't issue a parsing error, but still
// do not return a value.
if (ParsingBuf[0] == '\n')
consumeAllRemainingFS();
if (checkNewLine())
return NoneType();

ErrorOr<StringRef> NameStr = parseString(FieldSeparator, true);
Expand Down
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