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IRDL #7

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bd7da23
[libc++] Formats the forwarded ios headers.
mordante Apr 27, 2023
d58ba7a
[libc++][test] Makes pthread a flag.
mordante Apr 28, 2023
bc2cf42
[libc++][chrono] Adds formatter local_time.
mordante Apr 28, 2023
e2f8f77
[libc] Enable the 'stdlib' unit tests to be hermetic
jhuber6 May 2, 2023
c00f8f1
[libc] Split out FPExceptMatcher from the FP utils
jhuber6 May 3, 2023
78d7d62
[libc] Enable the '__support' unit tests to be hermetic
jhuber6 May 3, 2023
fe710ff
[libc] Don't use '-nolibc' on the GPU build
jhuber6 May 3, 2023
be09327
[flang][openacc] Always lower bounds with lb, ub and stride information
clementval May 3, 2023
1cef77d
[RISCV] Fix intrinsic name in comment for lowerInterleavedLoad/lowerI…
topperc May 3, 2023
9e6946c
[libc] Revert rounding mode changes for hermetic tests
jhuber6 May 3, 2023
8c22cbe
[analyzer] ArrayBoundCheckerV2: suppress false positives from ctype m…
NagyDonat Apr 28, 2023
7277a72
[Demangle] remove unused params of itaniumDemangle
nickdesaulniers May 3, 2023
5c34cda
[RISCV] Pass FeatureBitset to computeTargetABI by const reference. NFC
topperc May 3, 2023
cd05ffd
[lldb] Remove distribution_id from ArchSpec
bulbazord May 2, 2023
c2be702
Allow scripted thread plans to modify the thread stop description when
jimingham May 2, 2023
fc19204
[mlir][arith] Add narrowing patterns for index casts
kuhar May 3, 2023
ee17fd7
[libc] add socket function
michaelrj-google Apr 24, 2023
3befa46
[libc] Make printf decimal long doubles use hex
michaelrj-google Apr 12, 2023
7e6a158
[LTO] Add test for dllimport visibility fix
ormris Apr 21, 2023
8b8466f
[ArgumentPromotion] Bail if any callers are minsize
aeubanks May 3, 2023
791b0fd
[clang][dataflow] Change PruneTriviallyFalseEdges for building CFG
kinu May 3, 2023
9bb28a1
[C2x] Update 'nullptr' implementation based on CD comments
AaronBallman May 3, 2023
b9efffa
[VPlan] Add assignSlot(const VPBasicBlock *) (NFC).
fhahn May 3, 2023
3b01fa2
[Demangle] remove unused status param of itaniumDemangle
nickdesaulniers May 3, 2023
8fe8d69
[clang][deps] Make clang-scan-deps write modules in raw format
benlangmuir May 2, 2023
562cd31
[llvm][test] Skip physical filesystem test if unsupported
benlangmuir May 3, 2023
b210ebe
Fix test bot breakage from 9bb28a18d962e8f6e3fa8f48bd2c6dc183154d26
AaronBallman May 3, 2023
0d19739
[RISCV] Don't overcount FP constants in lowerBUILD_VECTOR
preames May 3, 2023
298d9be
Another fix for 9bb28a18d962e8f6e3fa8f48bd2c6dc183154d26
AaronBallman May 3, 2023
d627348
[SLP][NFC]Add ShuffleCostBuilder and generalize BaseShuffleAnalysis::…
alexey-bataev Apr 25, 2023
f0415f2
Re-land "[AMDGPU] Define data layout entries for buffers""
krzysz00 May 3, 2023
24f8122
Speculative fix for 9bb28a18d962e8f6e3fa8f48bd2c6dc183154d26
AaronBallman May 3, 2023
ce46e1a
[NFC][SLP] Cleanup: Simplify traversal loop in SLPVectorizerPass::vec…
vporpo Apr 28, 2023
3aaf0be
Account for whitespace in the test regex
AaronBallman May 3, 2023
24f36a2
[Modules] Move modulemaps to header search directories. NFC intended.
vsapsai Mar 9, 2023
6f29d1a
Reland [Pipeline] Don't limit ArgumentPromotion to -O3
aeubanks Apr 13, 2023
853d212
[InstSimplify] Update to handle new shufflevector semantics
ManuelJBrito Apr 30, 2023
bf6ff4f
[MemProf] Context disambiguation cloning pass [patch 3/4]
teresajohnson Jan 5, 2023
7b492d1
[clang][deps] Teach dep directive scanner about #pragma clang system_…
benlangmuir May 3, 2023
293b483
[SCEV] Add test where loop guards can be used to improve BTC.
fhahn May 3, 2023
3a54022
[Clang][Sema] Fix comparison of constraint expressions
alexander-shaposhnikov May 3, 2023
6fbf022
Revert "[MemProf] Context disambiguation cloning pass [patch 3/4]"
teresajohnson May 3, 2023
98c1104
[mlir][AMDGPU] Define atomic compare-and-swap for raw buffers
krzysz00 Apr 17, 2023
cc47037
[mlir][AMDGPU] Add emulation pass for atomics on AMDGPU targets
krzysz00 Apr 17, 2023
ee58f49
Change if() continue; to an assert if a DBG_VALUE or DBG_VALUE_LIST r…
rastogishubham May 3, 2023
91121ea
[libc++][PSTL] Reduce the amount of transitive includes
philnik777 May 2, 2023
94058c4
[mlir][GPU] Allow specifying alignment of memory attributions
krzysz00 Apr 18, 2023
7a607e2
[flang] Removed unnecessary llvm/CodeGen/SelectionDAGNodes.h include.
vzakhari May 3, 2023
f152796
[libc][rpc] Fix the memory ordering in lock.
JonChesterfield May 3, 2023
5c6be1d
[libc++][PSTL] Add design docs
philnik777 May 3, 2023
9ef5381
[CoroSplit][DebugInfo][nfc] Use more specialize Map arguments
felipepiovezan May 3, 2023
fc05b7f
[AMDGPU] Add gfx940 to fp64 atomic tests in global ISel
krzysz00 May 3, 2023
83478a1
[flang][openacc] Add proper TODO for reduction lowering
clementval May 3, 2023
abdb5e0
[WebAssembly] Remove incorrect result from wasm64 store_lane instruct…
tlively May 3, 2023
218b50a
[libc][rpc] Simplify mailbox state tracking
JonChesterfield May 3, 2023
ef1b735
[MLIR][python bindings] Add support for DenseElementsAttr of IndexType
makslevental May 2, 2023
20b12fa
Fix MathTransforms library dependencies
bondhugula May 3, 2023
2dc0fa0
[RISCV][CodeGen] Support Zdinx on RV64 codegen
May 3, 2023
1c2b812
[llvm-mca] Fix duplicate symbols error
michaelmaitland May 3, 2023
e48826e
Emit the correct flags for the PROC CodeView Debug Symbol
dpaoliello May 4, 2023
cd93532
[MS ABI] Fix C++ mangling references to declarations.
bolshakov-a May 4, 2023
55a74af
[mlir][sparse] Adding a new overload of `getOpaquePointerType`
wrengr May 4, 2023
3da83fb
[mlir][sparse] Improving error detection/messages for `get{RankedTens…
wrengr May 4, 2023
b05cd68
MCInstrAnalysis: make GotPltSectionVA x86-32 specific
MaskRay May 4, 2023
00f8bbf
Fix a warning in D149762 [-Wunused-variable]
chapuni May 4, 2023
93ce096
[BOLT][DWARF] Fix handling of loclists_base without location accesses
ayermolo May 4, 2023
b50f733
[flang][OpenMP] Lowering support for lastprivate on unstructured sect…
NimishMishra May 4, 2023
7aeb153
[llvm-objdump] addPltEntries: reduce indentation. NFC
MaskRay May 4, 2023
6a80827
[DebugInfo] add test case for D147506, NFC
Apr 4, 2023
b48a823
[DebugLine] save one debug line entry for empty prologue
May 4, 2023
b2eceea
[flang][OpenMP] Lowering support for atomic capture
NimishMishra May 4, 2023
7610087
[mlir][memref] Add helper to make alloca ops independent
matthias-springer May 4, 2023
92f67dc
[clang][Interp] Handle DiscardResult for DeclRef- and ParenExprs
tbaederr Apr 8, 2023
fd4c302
[clang][Interp][NFC] Call discard() when discarding ExprWithCleanups
tbaederr May 4, 2023
338c248
[clang][Interp] Implement inc/dec operators for floats
tbaederr Apr 21, 2023
9fb5af5
[lld][RISCV][NFC] Simplify symbol value calculation in relax
mtvec May 4, 2023
c267501
[libc] Use proper flags for compiler version detection
gchatelet May 4, 2023
6ccf330
[clang][Interp] Add missing static_assert messages
tbaederr May 4, 2023
67c9fd7
[clang][Interp][NFC] Make Pointer::block() const
tbaederr May 2, 2023
0354f31
[clang][Interp][NFC] Don't cast primitive types to the same type
tbaederr May 2, 2023
617fc0b
[clangd] Remove unused variable [NFC]
mikaelholmen May 4, 2023
a5eae04
[FuzzMutate] Remove unused variable [NFC]
mikaelholmen May 4, 2023
1f2c8f6
[flang][hlfir] Add hlfir.forall and its OrderAssignmentTreeOpInterface
jeanPerier May 4, 2023
9f867a3
[flang][hlfir] Add assignment mask operations
jeanPerier May 4, 2023
5c9a849
[clang][Interp][NFC] Use const references to Floating
tbaederr Apr 22, 2023
d3c0165
[clang][Interp][NFC] Remove unnecessary include from State.h
tbaederr May 4, 2023
7969275
[LV] Use VPValue for SCEV expansion in fixupIVUsers.
fhahn May 4, 2023
f248fc3
[mlir][Bazel] Update BUILD.bazel file for cc4703745ffa398b66f985b483c…
akuegel May 4, 2023
41a1415
[Flang][Driver][NFC] Improve -emit-obj unit tests
skatrak May 1, 2023
3928589
[DAG] computeKnownBits - remove old ashr TODO comment
RKSimon May 4, 2023
06b6170
[Support][Parallel] Change check for nested TaskGroups.
avl-llvm Apr 21, 2023
9e9bf1e
[RISCV] Use setcc to truncate results in widenVectorOpsToi8
lukel97 May 3, 2023
cb7e3da
[libc][rpc] Treat pointers as arrays consistently
JonChesterfield May 4, 2023
f3dcd3a
[clang-format] Correctly limit formatted ranges when specifying quali…
cogilvie May 4, 2023
f238a98
[OpenMP][libomptarget][AMDGPU] Enable active HSA wait state
gregrodgers Apr 19, 2023
1d8ab71
Revert "[DebugLine] save one debug line entry for empty prologue"
May 4, 2023
8cbb945
[flang]Add test for 2D loop versioning test
Leporacanthicus Apr 26, 2023
8bb4943
Revert "[DebugInfo] add test case for D147506, NFC"
May 4, 2023
eadf6db
[docs] Hide collaboration and include graphs in doxygen docs
tbaederr May 2, 2023
d9683a7
[RISCV] Fix extract_vector_elt on i1 at idx 0 being inverted
lukel97 May 3, 2023
b88023c
[analyzer][NFC] Use std::optional instead of custom "empty" state
NagyDonat Apr 26, 2023
41b5268
[flang] add hlfir.product operation
jacob-crawley Apr 5, 2023
508d49a
[flang] lower product intrinsic to hlfir.product operation
jacob-crawley Apr 19, 2023
7c57195
[flang][hlfir] lower hlfir.product into fir runtime call
jacob-crawley May 2, 2023
17faae9
[ADT] Introduce `map_to_vector` helper
May 3, 2023
632fa37
[libc] Enable running libc unit tests on AMDGPU
jhuber6 May 3, 2023
c3f1faf
[clang][Interp][NFC] Fix allocateLocalPrimitive parameter name
tbaederr May 4, 2023
c8f81ee
[clang-tidy] bugprone-use-after-move: Ctor arguments should be sequen…
martinboehme May 4, 2023
3cd230e
[libc][rpc] Fold can send/recv into buffer_unavailable
JonChesterfield May 4, 2023
909095a
AMDGPU: Precommit test showing codegen weakness
nhaehnle May 3, 2023
f05ce90
[NVPTX] Add NVPTXCtorDtorLoweringPass to handle global ctors / dtors
jhuber6 Apr 28, 2023
2e1c0ec
[libc] Support global constructors and destructors on NVPTX
jhuber6 Apr 28, 2023
62cc657
[gn build] Port f05ce9045af4
llvmgnsyncbot May 4, 2023
342a3ce
Move LLT::dump()'s impl to LowLevelType.cpp
chapuni May 4, 2023
9b21cb2
[mlir][emitc][nfc] Update ApplyOp example
marbre May 4, 2023
525d60b
[mlir][mem2reg] Add support for mem2reg in MemRef.
May 4, 2023
f19f749
[libc][rpc] Factor try_lock, unlock into functions on Process
JonChesterfield May 4, 2023
b85a402
[VPlan] Introduce new entry block to VPlan for early SCEV expansion.
fhahn May 4, 2023
62f1d91
[NFC][X86] Remove cfi instructions and unused attributes from half.ll…
e-kud May 4, 2023
a82d27a
[X86] Support llvm.{min,max}imum.f{16,32,64}
e-kud May 4, 2023
d9b92c4
[Coverity] Improper use of negtive value.
LuoYuanke May 4, 2023
c849843
[clang][dataflow][NFC] Eliminate unnecessary helper `stripReference()`.
martinboehme May 3, 2023
bfe7205
Restore "[MemProf] Context disambiguation cloning pass [patch 3/4]"
teresajohnson May 3, 2023
8167727
[CMake] Install FindLibEdit find module
ekilmer May 4, 2023
f4002c1
[libc] Enable running libc unit tests on NVPTX
jhuber6 Apr 28, 2023
3984032
Add the experiemental interpreter to the open project page
AaronBallman May 4, 2023
287aa6c
[DAGCombiner] Use generalized pattern match for visitFSUBForFMACombine.
May 4, 2023
e3e6bc6
[MemProf] Need to require asserts for tests that use -stats
teresajohnson May 4, 2023
efc494a
[libc++] Add missing test for std::hash<std::filesystem::path>
ldionne May 2, 2023
ca40985
[compiler-rt][interception][win] Add more assembly patterns
alvinhochun Apr 22, 2023
814a75d
[compiler-rt][asan][win] Intercept exceptions for i686 MinGW
alvinhochun Apr 22, 2023
7b5571f
[compiler-rt][interception][win] Don't crash on unknown instructions
alvinhochun Apr 22, 2023
0716888
[compiler-rt][interception][asan][win] Improve error reporting
alvinhochun Apr 29, 2023
1a7a00b
[compiler-rt][interception][win] Add error messages for some errors
alvinhochun Apr 22, 2023
2444fb9
[InstSimplify] Test case for icmp imply (NFC)
floatshadow May 4, 2023
edcdc81
[ValueTracking] add UGT/UGE and SGT/SGE in `isImpliedCondOperands`
floatshadow May 4, 2023
62a2a07
[libc][Docs] Add warning about running GPU tests with parallelism
jhuber6 May 4, 2023
147a561
[VPlan] Clean up preheader block after b85a402dd899fc.
fhahn May 4, 2023
35309db
[OpenMP][OMPIRBuilder] Migrate MapCombinedInfoTy from Clang to OpenMP…
TIFitis May 2, 2023
9c4717a
[libc++][PSTL][NFC] Fix the naming in the SIMD backend
philnik777 May 3, 2023
36c95ee
[mlir][sparse] group tensor id and levels into pairs in loop emitter
Apr 17, 2023
ec2c0e0
[flang][hlfir] Generate explicit HLFIR type cast for implicit logical…
vzakhari May 4, 2023
3460f72
EntryExitInstrumenter: skip naked functions
MaskRay May 4, 2023
cdd01e4
[libc++][PSTL] Move all the OpenMP conditionals into a single block
philnik777 May 2, 2023
9cb42ef
Remove obsolete patch for arcanist: this is already in the upstream p…
joker-eph May 4, 2023
734adda
[flang][openacc] Lower copyout, detach and delete to data exit operat…
clementval May 4, 2023
f09807c
Revert "Restore "[MemProf] Context disambiguation cloning pass [patch…
teresajohnson May 4, 2023
053bf86
MS inline asm: remove obsolete code adding AOK_SizeDirective (e.g. dw…
MaskRay May 4, 2023
c0e5e7d
[SLP]Fix a crash trying finding insert point for GEP nodes with non-gep
alexey-bataev May 4, 2023
629177a
Fix test bot breakage from 06b617064a997574df409c7d846b6f6b492f5124
avl-llvm May 4, 2023
6d68805
[clang][Sema][NFC] Move `EnterExpressionEvaluationContext` to its own…
davidstone May 4, 2023
ba15d18
[clang] Use -std=c++23 instead of -std=c++2b
mordante Apr 30, 2023
0e1429a
[mlir][sparse] fix build error.
May 4, 2023
f7643f8
[BOLT] Remove redundant dumps in AsmDump
aaupov May 3, 2023
a4ba7da
[libc][rpc] Pass lane_mask into lock functions
JonChesterfield May 4, 2023
3bcc28b
[flang][openacc] Lower data construct operand to data operand operations
clementval May 4, 2023
cc3be76
[libc++][test] Selects proper C++23 field.
mordante Apr 30, 2023
eee32d6
[lldb] Remove unused g_objc_Tagged_ISA constants (NFC)
kastiglione May 4, 2023
b4692f2
[Clang] Updating handling of defaulted comparison operators to reflec…
shafik May 4, 2023
7f00ba0
Restore mlir-opt `--run-reproducer` option to opt-in running a reprod…
joker-eph May 4, 2023
c2bef38
[VPlan] Remove setEntry to avoid leaks when replacing entry.
fhahn May 4, 2023
ac8c032
[flang][openacc] Lower data clause on compute construct to data opera…
clementval May 4, 2023
ae39de9
[MIRParser][nfc] Factor out code parsing debug MD nodes
felipepiovezan May 4, 2023
5337cd8
[gn build] Fix tblgen CodeGen dependencies
aeubanks May 4, 2023
cbcf55d
[libc] Maintain proper alignment for the hermetic tests malloc
jhuber6 May 4, 2023
b323b40
[clang] Fix build after https://reviews.llvm.org/D149553
darkbuck May 4, 2023
058f04e
[clang] Fix another case where CPlusPlus2b is still used.
darkbuck May 4, 2023
cd31802
[llvm-objdump][COFF] Skip empty export entries when dumping the expor…
aganea May 4, 2023
7887af0
Fix build bots due to missing a commit thay change 2b to 23
shafik May 4, 2023
e12d8f5
[libc++][PSTL] Replace _PSTL_ASSERT with _LIBCPP_ASSERT
philnik777 May 2, 2023
14805dc
[clang][ExtractAPI] Add semicolon to function declaration fragments
chaitanyav May 4, 2023
ead5024
docs: Document policy around GitHub branches
tstellar May 4, 2023
fb6faf4
[libc] Improve the add_libc_test rule.
May 3, 2023
b772657
Revert "[libc] Improve the add_libc_test rule."
May 4, 2023
9d0258e
[libc] Remove support for atomic test due to failing on sm_60
jhuber6 May 4, 2023
d1d4e56
[llvm-profdata] Change default output format of llvm-profdata to ExtB…
huangjd May 2, 2023
c395a84
[MSP430] Get the DWARF pointer size from MCAsmInfo instead of DataLay…
kuilpd May 4, 2023
db5f745
[lldb] Make some functions useful to REPLs public
walter-erquinigo May 3, 2023
bfb7c99
[LLDB] Add a hook to notify REPLs that an expression was evaluated
walter-erquinigo May 3, 2023
09ceb47
[libc][rpc] Land helpers from D148943
JonChesterfield May 4, 2023
4fac08f
Recognize `addressing_bits` kv in stop reply packet
jasonmolenda May 4, 2023
2e16e41
Add AArch64 MASK watchpoint support in debugserver
jasonmolenda May 4, 2023
1b05e74
[VPlan] Reorder cases in switch (NFC).
fhahn May 4, 2023
5cba771
Revert "[libc][rpc] Land helpers from D148943"
JonChesterfield May 4, 2023
dc39d98
[lldb][NFCI] Add unittests for ObjCLanguage::MethodName
bulbazord May 4, 2023
ed443d8
[AggressiveInstCombine] Only fold consecutive shifts of loads with co…
aeubanks May 4, 2023
d726f99
[SLP][NFC]Do not try to revectorize instructions with constant operan…
alexey-bataev May 4, 2023
bfbe137
[clang][dataflow] Eliminate intermediate `ReferenceValue`s from `Envi…
martinboehme May 4, 2023
2fa1bec
[ASan][libcxx] A way to turn off annotations for containers with a sp…
May 4, 2023
f031fc3
[NFC][HWASAN] Switch to verbose CHECKs
vitalybuka May 4, 2023
0a53220
Give NullabilityKind a printing operator<<
sam-mccall May 2, 2023
b132373
[libc][rpc] Update locking to work on volta
JonChesterfield May 4, 2023
8aaaa1c
Revert "[libc][rpc] Update locking to work on volta"
JonChesterfield May 4, 2023
75b7b9f
[libc][rpc] Update locking to work on volta
JonChesterfield May 4, 2023
8052c1e
[mlir][openacc][NFC] Remove braces on single statement bodies
clementval May 4, 2023
4c9c1a4
[libc] Enable linux directory entries syscalls in riscv64
mikhailramalho May 4, 2023
04aa943
[lldb] Expose a const iterator for SymbolContextList
bulbazord May 4, 2023
6f8b33f
[lldb] Use templates to simplify {Get,Set}PropertyAtIndex (NFC)
JDevlieghere May 4, 2023
3d6073a
Revert "[lldb] Expose a const iterator for SymbolContextList"
bulbazord May 4, 2023
f10bcf6
[RISCV] Add vp.icmp/fcmp to RISCVTargetLowering::canSplatOperand.
topperc May 4, 2023
3b9ed6e
Revert "[Clang][Sema] Fix comparison of constraint expressions"
alexander-shaposhnikov May 5, 2023
fe9f557
[DAGCombiner][RISCV] Enable reassociation for VP_FMA in visitFADDForF…
topperc May 5, 2023
507edb5
[libc] Enable multiple threads to use RPC on the GPU
jhuber6 May 4, 2023
901266d
[libc] Change GPU startup and loader to use multiple kernels
jhuber6 May 1, 2023
c08d4ad
[ASan][libcxx] Annotating std::vector with all allocators
May 5, 2023
b2420c6
[RISCV] Restrict valid indices for cm.jalt to be in [32,255].
topperc May 5, 2023
b0fb982
[Coverity] Big parameter passed by value.
LuoYuanke May 5, 2023
2e3cabe
[SeparateConstOffsetFromGEP] Fix bug handling negative offsets
tstellar May 5, 2023
ae1ca47
[Coverity] Big parameter passed by value.
LuoYuanke May 5, 2023
2e93dd0
[libc] Fix hanging test on NVPTX due to lack of warp sync
jhuber6 May 5, 2023
38007dd
[RISCV] Promote i1 shuffles to i8 shuffles.
topperc May 5, 2023
776d50d
[SPARC][MC] Fix encoding of backwards BPr branches
brad0 May 5, 2023
8e6b3cc
[SPIRV] Adapt itaniumDemangle change after itaniumDemangle
MaskRay May 5, 2023
261db5f
[FuzzMutate] Make ShuffleBlockStrategy deterministic
tinkerrc May 5, 2023
b193bd3
[lldb] Remove SetPropertyAtIndexAsLanguage (NFC)
JDevlieghere May 5, 2023
8cf7688
[RISCV] Remove unused def simm12_plus1 from RISCVInstrInfo.td. NFC
ChunyuLiao May 5, 2023
917b3a7
[lldb] Move Core/FileSpecList -> Utility/FileSpecList (NFC)
JDevlieghere May 5, 2023
3145e60
[gn build] Port 917b3a7e6206
llvmgnsyncbot May 5, 2023
ab73a9c
[lldb] Eliminate {Get,Set}PropertyAtIndexAsFileSpec (NFC)
JDevlieghere May 5, 2023
01260bb
[MC] registerSymbol: change an output paramter to return value
MaskRay May 5, 2023
d421c5f
[RISCV] Directly create MCOperands from addImplySP in Disassembler. NFC
topperc May 5, 2023
300dce9
[lldb] Migrate to GetPropertyAtIndexAs for FileSpecList (NFC)
JDevlieghere May 5, 2023
89e02c7
[test] Update DirectX/min_vec_size.ll after shufflevector mask vector…
MaskRay May 5, 2023
eed9932
[mlir] Use std::optional instead of llvm::Optional (NFC)
kazutakahirata May 5, 2023
e955e4f
[clang] Replace None with std::nullopt in comments (NFC)
kazutakahirata May 5, 2023
814e8d7
[RISCV] Omit the template parameters in getSerializableMachineMemOper…
DamonFool May 5, 2023
a08cbab
[MC] Optimize relaxInstruction: remove SmallVector copy. NFC
MaskRay May 5, 2023
03cda77
[libc++][spaceship] Implement `operator<=>` for `optional`
Zingam Apr 28, 2023
309bfec
[mlir][tosa] Call TosaInferShapes pass in addTosaToLinalgPasses
AviadCo Apr 22, 2023
0aa80b4
[flang][hlfir] Add hlfir.forall_index operation
jeanPerier May 5, 2023
88ed439
[flang][hlfir] Add ordered assignment pass with TODOs
jeanPerier May 5, 2023
81cb43f
[ORC][MachOPlatform] Don't add InitSectionSymbols for __objc_imageinfo.
lhames May 5, 2023
62d7d94
[mlir][LLVM] Support locations in loop annotation
Dinistro May 5, 2023
29712cc
[VPlan] Assert instead of check if VF is vector when widening casts.
fhahn May 5, 2023
00ff746
[LoopSimplify] Reduce amount of redundant SCEV invalidation (NFCI)
nikic May 4, 2023
caa95c2
[AArch64] Emit FNMADD instead of FNEG(FMADD)
MDevereau May 4, 2023
a9919db
Add AArch64 requirement for aarch64_fnmadd.ll
MDevereau May 5, 2023
96e09fe
[X86] Avoid usage constant NaN for fminimum/fmaximum lowering
May 3, 2023
ef13308
AMDGPU/SDAG: Improve {extract,insert}_subvector lowering for 16-bit v…
nhaehnle May 3, 2023
de24d08
[FuncSpec] Fix inconsistent treatment of global variables
momchil-velikov May 4, 2023
4247806
[NFC] [Coroutines] Add a fastpath when computing the cross suspend po…
ChuanqiXu9 May 5, 2023
50cd2ff
[X86] Avoid usage constant -1 for fminimum/fmaximum lowering
May 4, 2023
aa4f921
Update BUILD.bazel for Mem2Reg deps.
wenzhi-cui May 5, 2023
1d424ee
[NFC][ValueTracking] Hoist isValidAssumeForContext out of switch
xortator May 5, 2023
e8fb478
[clang][Interp] Don't call getSource() on functions without a body
tbaederr May 3, 2023
7fbf72a
[ValueTracking][NFC] Factor out computeKnownBitsFromCmp
xortator May 5, 2023
ddd393a
Add IRDL constraints structures
math-fehr Mar 9, 2023
f3084fc
Add verification of constraints of IRDL ops
math-fehr Mar 8, 2023
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[X86] Avoid usage constant NaN for fminimum/fmaximum lowering
After applying FMIN/FMAX, if any of operands is NaN, the second operand will be the result.
So all we need is to check whether first operand is NaN and return it or result of FMIN/FMAX.

So we avoid usage of constant NaN in the lowering.

Additionally we can avoid handling NaN after FMIN/FMAX if we are sure that first operand is not NaN.

Reviewed By: e-kud
Differential Revision: https://reviews.llvm.org/D149729
Serguei Katkov committed May 5, 2023

Verified

This commit was signed with the committer’s verified signature.
snyk-bot Snyk bot
commit 96e09fef3cd8cf1f8f18d6cc70ba7bb6d8dcc4c3
48 changes: 29 additions & 19 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
Original file line number Diff line number Diff line change
@@ -30253,9 +30253,9 @@ static SDValue LowerFMINIMUM_FMAXIMUM(SDValue Op, const X86Subtarget &Subtarget,
// Y Y
// Num xNaN +0 -0
// --------------- ---------------
// Num | Max | qNaN | +0 | +0 | +0 |
// Num | Max | Y | +0 | +0 | +0 |
// X --------------- X ---------------
// xNaN | qNaN | qNaN | -0 | +0 | -0 |
// xNaN | X | X/Y | -0 | +0 | -0 |
// --------------- ---------------
//
// It is achieved by means of FMAX/FMIN with preliminary checks and operand
@@ -30273,15 +30273,18 @@ static SDValue LowerFMINIMUM_FMAXIMUM(SDValue Op, const X86Subtarget &Subtarget,
return false;
};

SDValue MinMax;
bool IsXNeverNaN = DAG.isKnownNeverNaN(X);
bool IsYNeverNaN = DAG.isKnownNeverNaN(Y);
if (DAG.getTarget().Options.NoSignedZerosFPMath ||
Op->getFlags().hasNoSignedZeros() || IsPreferredZero(Y) ||
DAG.isKnownNeverZeroFloat(X)) {
MinMax = DAG.getNode(MinMaxOp, DL, VT, X, Y, Op->getFlags());
bool IgnoreSignedZero = DAG.getTarget().Options.NoSignedZerosFPMath ||
Op->getFlags().hasNoSignedZeros();
SDValue NewX, NewY;
if (IgnoreSignedZero || IsPreferredZero(Y) || DAG.isKnownNeverZeroFloat(X)) {
// Operands are already in right order or order does not matter.
NewX = X;
NewY = Y;
} else if (IsPreferredZero(X) || DAG.isKnownNeverZeroFloat(Y)) {
MinMax = DAG.getNode(MinMaxOp, DL, VT, Y, X, Op->getFlags());
NewX = Y;
NewY = X;
} else if ((VT == MVT::f16 || Subtarget.hasDQI()) &&
(Op->getFlags().hasNoNaNs() || IsXNeverNaN || IsYNeverNaN)) {
if (IsXNeverNaN)
@@ -30300,8 +30303,8 @@ static SDValue LowerFMINIMUM_FMAXIMUM(SDValue Op, const X86Subtarget &Subtarget,
DAG.getConstant(0, DL, MVT::v8i1), IsNanZero,
DAG.getIntPtrConstant(0, DL));
SDValue NeedSwap = DAG.getBitcast(MVT::i8, Ins);
SDValue NewX = DAG.getSelect(DL, VT, NeedSwap, Y, X);
SDValue NewY = DAG.getSelect(DL, VT, NeedSwap, X, Y);
NewX = DAG.getSelect(DL, VT, NeedSwap, Y, X);
NewY = DAG.getSelect(DL, VT, NeedSwap, X, Y);
return DAG.getNode(MinMaxOp, DL, VT, NewX, NewY, Op->getFlags());
} else {
SDValue IsXZero;
@@ -30330,19 +30333,26 @@ static SDValue LowerFMINIMUM_FMAXIMUM(SDValue Op, const X86Subtarget &Subtarget,
IsXZero = DAG.getSetCC(DL, SetCCType, IsXZero,
DAG.getConstant(0, DL, MVT::i32), ISD::SETEQ);
}
SDValue NewX = DAG.getSelect(DL, VT, IsXZero, Y, X);
SDValue NewY = DAG.getSelect(DL, VT, IsXZero, X, Y);
MinMax = DAG.getNode(MinMaxOp, DL, VT, NewX, NewY, Op->getFlags());
NewX = DAG.getSelect(DL, VT, IsXZero, Y, X);
NewY = DAG.getSelect(DL, VT, IsXZero, X, Y);
}

if (Op->getFlags().hasNoNaNs() || (IsXNeverNaN && IsYNeverNaN))
bool IgnoreNaN = DAG.getTarget().Options.NoNaNsFPMath ||
Op->getFlags().hasNoNaNs() || (IsXNeverNaN && IsYNeverNaN);

// If we did no ordering operands for singed zero handling and we need
// to process NaN and we know that the second operand is not NaN then put
// it in first operand and we will not need to post handle NaN after max/min.
if (IgnoreSignedZero && !IgnoreNaN && DAG.isKnownNeverNaN(NewY))
std::swap(NewX, NewY);

SDValue MinMax = DAG.getNode(MinMaxOp, DL, VT, NewX, NewY, Op->getFlags());

if (IgnoreNaN || DAG.isKnownNeverNaN(NewX))
return MinMax;

APFloat NaNValue = APFloat::getNaN(DAG.EVTToAPFloatSemantics(VT));
SDValue IsNaN = DAG.getSetCC(DL, SetCCType, IsXNeverNaN ? Y : X,
IsYNeverNaN ? X : Y, ISD::SETUO);
return DAG.getSelect(DL, VT, IsNaN, DAG.getConstantFP(NaNValue, DL, VT),
MinMax);
SDValue IsNaN = DAG.getSetCC(DL, SetCCType, NewX, NewX, ISD::SETUO);
return DAG.getSelect(DL, VT, IsNaN, NewX, MinMax);
}

static SDValue LowerABD(SDValue Op, const X86Subtarget &Subtarget,
46 changes: 22 additions & 24 deletions llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
Original file line number Diff line number Diff line change
@@ -14,13 +14,13 @@ define half @test_fminimum(half %x, half %y) {
; CHECK-NEXT: cmpl $32768, %eax # imm = 0x8000
; CHECK-NEXT: sete %al
; CHECK-NEXT: kmovd %eax, %k1
; CHECK-NEXT: vmovaps %xmm0, %xmm2
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm2 {%k1}
; CHECK-NEXT: vcmpunordsh %xmm1, %xmm0, %k2
; CHECK-NEXT: vmovaps %xmm1, %xmm2
; CHECK-NEXT: vmovsh %xmm0, %xmm0, %xmm2 {%k1}
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: vminsh %xmm2, %xmm0, %xmm1
; CHECK-NEXT: vcmpunordsh %xmm0, %xmm0, %k1
; CHECK-NEXT: vmovsh %xmm0, %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vminsh %xmm1, %xmm2, %xmm0
; CHECK-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k2}
; CHECK-NEXT: vmovaps %xmm1, %xmm0
; CHECK-NEXT: retq
%z = call half @llvm.minimum.f16(half %x, half %y)
ret half %z
@@ -79,10 +79,9 @@ define half @test_fminimum_nnan(half %x, half %y) "no-nans-fp-math"="true" {
define half @test_fminimum_zero(half %x, half %y) {
; CHECK-LABEL: test_fminimum_zero:
; CHECK: # %bb.0:
; CHECK-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
; CHECK-NEXT: vcmpunordsh %xmm1, %xmm1, %k1
; CHECK-NEXT: vminsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
; CHECK-NEXT: vmovsh %xmm2, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: retq
%1 = tail call half @llvm.minimum.f16(half -0.0, half %y)
ret half %1
@@ -91,10 +90,10 @@ define half @test_fminimum_zero(half %x, half %y) {
define half @test_fminimum_nsz(half %x, half %y) {
; CHECK-LABEL: test_fminimum_nsz:
; CHECK: # %bb.0:
; CHECK-NEXT: vcmpunordsh %xmm1, %xmm0, %k1
; CHECK-NEXT: vminsh %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: vminsh %xmm1, %xmm0, %xmm1
; CHECK-NEXT: vcmpunordsh %xmm0, %xmm0, %k1
; CHECK-NEXT: vmovsh %xmm0, %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vmovaps %xmm1, %xmm0
; CHECK-NEXT: retq
%1 = tail call nsz half @llvm.minimum.f16(half %x, half %y)
ret half %1
@@ -122,13 +121,13 @@ define half @test_fmaximum(half %x, half %y) {
; CHECK-NEXT: testw %ax, %ax
; CHECK-NEXT: sete %al
; CHECK-NEXT: kmovd %eax, %k1
; CHECK-NEXT: vmovaps %xmm0, %xmm2
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm2 {%k1}
; CHECK-NEXT: vcmpunordsh %xmm1, %xmm0, %k2
; CHECK-NEXT: vmovaps %xmm1, %xmm2
; CHECK-NEXT: vmovsh %xmm0, %xmm0, %xmm2 {%k1}
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: vmaxsh %xmm2, %xmm0, %xmm1
; CHECK-NEXT: vcmpunordsh %xmm0, %xmm0, %k1
; CHECK-NEXT: vmovsh %xmm0, %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vmaxsh %xmm1, %xmm2, %xmm0
; CHECK-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k2}
; CHECK-NEXT: vmovaps %xmm1, %xmm0
; CHECK-NEXT: retq
%r = call half @llvm.maximum.f16(half %x, half %y)
ret half %r
@@ -193,9 +192,8 @@ define half @test_fmaximum_zero(half %x, half %y) {
; CHECK: # %bb.0:
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: vmaxsh %xmm0, %xmm1, %xmm0
; CHECK-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
; CHECK-NEXT: vcmpunordsh %xmm1, %xmm1, %k1
; CHECK-NEXT: vmovsh %xmm2, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: retq
%1 = tail call half @llvm.maximum.f16(half 0.0, half %y)
ret half %1
@@ -204,10 +202,10 @@ define half @test_fmaximum_zero(half %x, half %y) {
define half @test_fmaximum_nsz(half %x, half %y) "no-signed-zeros-fp-math"="true" {
; CHECK-LABEL: test_fmaximum_nsz:
; CHECK: # %bb.0:
; CHECK-NEXT: vcmpunordsh %xmm1, %xmm0, %k1
; CHECK-NEXT: vmaxsh %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vmovsh {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
; CHECK-NEXT: vmovsh %xmm1, %xmm0, %xmm0 {%k1}
; CHECK-NEXT: vmaxsh %xmm1, %xmm0, %xmm1
; CHECK-NEXT: vcmpunordsh %xmm0, %xmm0, %k1
; CHECK-NEXT: vmovsh %xmm0, %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vmovaps %xmm1, %xmm0
; CHECK-NEXT: retq
%1 = tail call half @llvm.maximum.f16(half %x, half %y)
ret half %1
12 changes: 2 additions & 10 deletions llvm/test/CodeGen/X86/extract-fp.ll
Original file line number Diff line number Diff line change
@@ -111,11 +111,7 @@ define double @ext_maximum_v4f64(<2 x double> %x) nounwind {
; CHECK-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: maxsd %xmm0, %xmm1
; CHECK-NEXT: cmpunordsd %xmm0, %xmm0
; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
; CHECK-NEXT: andpd %xmm0, %xmm2
; CHECK-NEXT: andnpd %xmm1, %xmm0
; CHECK-NEXT: orpd %xmm2, %xmm0
; CHECK-NEXT: movapd %xmm1, %xmm0
; CHECK-NEXT: retq
%v = call <2 x double> @llvm.maximum.v2f64(<2 x double> %x, <2 x double> <double 42.0, double 43.0>)
%r = extractelement <2 x double> %v, i32 1
@@ -128,11 +124,7 @@ define float @ext_minimum_v4f32(<4 x float> %x) nounwind {
; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: minss %xmm0, %xmm1
; CHECK-NEXT: cmpunordss %xmm0, %xmm0
; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: andps %xmm0, %xmm2
; CHECK-NEXT: andnps %xmm1, %xmm0
; CHECK-NEXT: orps %xmm2, %xmm0
; CHECK-NEXT: movaps %xmm1, %xmm0
; CHECK-NEXT: retq
%v = call <4 x float> @llvm.minimum.v4f32(<4 x float> %x, <4 x float> <float 0.0, float 1.0, float 2.0, float 42.0>)
%r = extractelement <4 x float> %v, i32 1
76 changes: 32 additions & 44 deletions llvm/test/CodeGen/X86/extractelement-fp.ll
Original file line number Diff line number Diff line change
@@ -680,16 +680,14 @@ define float @fmaximum_v4f32(<4 x float> %x, <4 x float> %y) nounwind {
; X64-NEXT: je .LBB30_1
; X64-NEXT: # %bb.2:
; X64-NEXT: vmovdqa %xmm1, %xmm2
; X64-NEXT: vmovdqa %xmm0, %xmm3
; X64-NEXT: jmp .LBB30_3
; X64-NEXT: .LBB30_1:
; X64-NEXT: vmovdqa %xmm0, %xmm2
; X64-NEXT: vmovdqa %xmm1, %xmm3
; X64-NEXT: vmovdqa %xmm1, %xmm0
; X64-NEXT: .LBB30_3:
; X64-NEXT: vmaxss %xmm2, %xmm3, %xmm2
; X64-NEXT: vcmpunordss %xmm1, %xmm0, %xmm0
; X64-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
; X64-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
; X64-NEXT: vmaxss %xmm2, %xmm0, %xmm1
; X64-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
; X64-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; X64-NEXT: retq
;
; X86-LABEL: fmaximum_v4f32:
@@ -699,17 +697,15 @@ define float @fmaximum_v4f32(<4 x float> %x, <4 x float> %y) nounwind {
; X86-NEXT: je .LBB30_1
; X86-NEXT: # %bb.2:
; X86-NEXT: vmovdqa %xmm1, %xmm2
; X86-NEXT: vmovdqa %xmm0, %xmm3
; X86-NEXT: jmp .LBB30_3
; X86-NEXT: .LBB30_1:
; X86-NEXT: vmovdqa %xmm0, %xmm2
; X86-NEXT: vmovdqa %xmm1, %xmm3
; X86-NEXT: vmovdqa %xmm1, %xmm0
; X86-NEXT: .LBB30_3:
; X86-NEXT: pushl %eax
; X86-NEXT: vmaxss %xmm2, %xmm3, %xmm2
; X86-NEXT: vcmpunordss %xmm1, %xmm0, %xmm0
; X86-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
; X86-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
; X86-NEXT: vmaxss %xmm2, %xmm0, %xmm1
; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; X86-NEXT: vmovss %xmm0, (%esp)
; X86-NEXT: flds (%esp)
; X86-NEXT: popl %eax
@@ -727,15 +723,14 @@ define double @fmaximum_v4f64(<4 x double> %x, <4 x double> %y) nounwind {
; X64-NEXT: je .LBB31_1
; X64-NEXT: # %bb.2:
; X64-NEXT: vmovdqa %xmm1, %xmm2
; X64-NEXT: vmovdqa %xmm0, %xmm3
; X64-NEXT: jmp .LBB31_3
; X64-NEXT: .LBB31_1:
; X64-NEXT: vmovdqa %xmm0, %xmm2
; X64-NEXT: vmovdqa %xmm1, %xmm3
; X64-NEXT: vmovdqa %xmm1, %xmm0
; X64-NEXT: .LBB31_3:
; X64-NEXT: vmaxsd %xmm2, %xmm3, %xmm2
; X64-NEXT: vcmpunordsd %xmm1, %xmm0, %xmm0
; X64-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; X64-NEXT: vmaxsd %xmm2, %xmm0, %xmm1
; X64-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
; X64-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: retq
;
@@ -747,19 +742,18 @@ define double @fmaximum_v4f64(<4 x double> %x, <4 x double> %y) nounwind {
; X86-NEXT: je .LBB31_1
; X86-NEXT: # %bb.2:
; X86-NEXT: vmovdqa %xmm1, %xmm2
; X86-NEXT: vmovdqa %xmm0, %xmm3
; X86-NEXT: jmp .LBB31_3
; X86-NEXT: .LBB31_1:
; X86-NEXT: vmovdqa %xmm0, %xmm2
; X86-NEXT: vmovdqa %xmm1, %xmm3
; X86-NEXT: vmovdqa %xmm1, %xmm0
; X86-NEXT: .LBB31_3:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $8, %esp
; X86-NEXT: vmaxsd %xmm2, %xmm3, %xmm2
; X86-NEXT: vcmpunordsd %xmm1, %xmm0, %xmm0
; X86-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2, %xmm0
; X86-NEXT: vmaxsd %xmm2, %xmm0, %xmm1
; X86-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
; X86-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; X86-NEXT: vmovlpd %xmm0, (%esp)
; X86-NEXT: fldl (%esp)
; X86-NEXT: movl %ebp, %esp
@@ -779,16 +773,14 @@ define float @fminimum_v4f32(<4 x float> %x, <4 x float> %y) nounwind {
; X64-NEXT: je .LBB32_1
; X64-NEXT: # %bb.2:
; X64-NEXT: vmovdqa %xmm1, %xmm2
; X64-NEXT: vmovdqa %xmm0, %xmm3
; X64-NEXT: jmp .LBB32_3
; X64-NEXT: .LBB32_1:
; X64-NEXT: vmovdqa %xmm0, %xmm2
; X64-NEXT: vmovdqa %xmm1, %xmm3
; X64-NEXT: vmovdqa %xmm1, %xmm0
; X64-NEXT: .LBB32_3:
; X64-NEXT: vminss %xmm2, %xmm3, %xmm2
; X64-NEXT: vcmpunordss %xmm1, %xmm0, %xmm0
; X64-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
; X64-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
; X64-NEXT: vminss %xmm2, %xmm0, %xmm1
; X64-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
; X64-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; X64-NEXT: retq
;
; X86-LABEL: fminimum_v4f32:
@@ -798,17 +790,15 @@ define float @fminimum_v4f32(<4 x float> %x, <4 x float> %y) nounwind {
; X86-NEXT: je .LBB32_1
; X86-NEXT: # %bb.2:
; X86-NEXT: vmovdqa %xmm1, %xmm2
; X86-NEXT: vmovdqa %xmm0, %xmm3
; X86-NEXT: jmp .LBB32_3
; X86-NEXT: .LBB32_1:
; X86-NEXT: vmovdqa %xmm0, %xmm2
; X86-NEXT: vmovdqa %xmm1, %xmm3
; X86-NEXT: vmovdqa %xmm1, %xmm0
; X86-NEXT: .LBB32_3:
; X86-NEXT: pushl %eax
; X86-NEXT: vminss %xmm2, %xmm3, %xmm2
; X86-NEXT: vcmpunordss %xmm1, %xmm0, %xmm0
; X86-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
; X86-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
; X86-NEXT: vminss %xmm2, %xmm0, %xmm1
; X86-NEXT: vcmpunordss %xmm0, %xmm0, %xmm2
; X86-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; X86-NEXT: vmovss %xmm0, (%esp)
; X86-NEXT: flds (%esp)
; X86-NEXT: popl %eax
@@ -827,15 +817,14 @@ define double @fminimum_v4f64(<4 x double> %x, <4 x double> %y) nounwind {
; X64-NEXT: je .LBB33_1
; X64-NEXT: # %bb.2:
; X64-NEXT: vmovdqa %xmm1, %xmm2
; X64-NEXT: vmovdqa %xmm0, %xmm3
; X64-NEXT: jmp .LBB33_3
; X64-NEXT: .LBB33_1:
; X64-NEXT: vmovdqa %xmm0, %xmm2
; X64-NEXT: vmovdqa %xmm1, %xmm3
; X64-NEXT: vmovdqa %xmm1, %xmm0
; X64-NEXT: .LBB33_3:
; X64-NEXT: vminsd %xmm2, %xmm3, %xmm2
; X64-NEXT: vcmpunordsd %xmm1, %xmm0, %xmm0
; X64-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm0
; X64-NEXT: vminsd %xmm2, %xmm0, %xmm1
; X64-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
; X64-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: retq
;
@@ -848,19 +837,18 @@ define double @fminimum_v4f64(<4 x double> %x, <4 x double> %y) nounwind {
; X86-NEXT: je .LBB33_1
; X86-NEXT: # %bb.2:
; X86-NEXT: vmovdqa %xmm1, %xmm2
; X86-NEXT: vmovdqa %xmm0, %xmm3
; X86-NEXT: jmp .LBB33_3
; X86-NEXT: .LBB33_1:
; X86-NEXT: vmovdqa %xmm0, %xmm2
; X86-NEXT: vmovdqa %xmm1, %xmm3
; X86-NEXT: vmovdqa %xmm1, %xmm0
; X86-NEXT: .LBB33_3:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $8, %esp
; X86-NEXT: vminsd %xmm2, %xmm3, %xmm2
; X86-NEXT: vcmpunordsd %xmm1, %xmm0, %xmm0
; X86-NEXT: vblendvpd %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2, %xmm0
; X86-NEXT: vminsd %xmm2, %xmm0, %xmm1
; X86-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm2
; X86-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; X86-NEXT: vmovlpd %xmm0, (%esp)
; X86-NEXT: fldl (%esp)
; X86-NEXT: movl %ebp, %esp
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