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Swtg report 22 feb 21 (#379)
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* Software TG report to TWG meeting 22 March 2021

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	* program/TG-reports-for-TWG/2021/20210322-sw-tg.md: Created.

Signed-off-by: Jeremy Bennett <jeremy.bennett@embecosm.com>

* Software TG report to TWG meeting 22 February 2021

	A late commit - the orignal was only ever posted as a Mattermost
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Files changed:

	* program/TG-reports-for-TWG/2021/20210222-sw-tg.md: Created.

Signed-off-by: Jeremy Bennett <jeremy.bennett@embecosm.com>
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# Software TG Report February 2021

Presented to TWG meeting 22 February 2021.

## Reports on active projects

Links to reports on four projects in progress.

* [IDE monthly report ](https://github.com/openhwgroup/core-v-sw/blob/master/projects/ide/2021/monthly-report-2021-02-08.md)

* Lead @ruspl-afed
* Passed concept proposal gate
* Now working with a secured connection to hardware at Quicklogic
* Basic welcome page now up

* [GNU tools monthly report](https://github.com/openhwgroup/core-v-sw/blob/master/projects/gnu-tools/2021/monthly-report-2021-02-08.md)

* Lead @jessicamills
* Passed concept proposal gate
* University of Bologna to carry out their work as Embecosm consultants to meet FSF copyright assignment requirements
* 17 tasks complete, 4 in progress, 13 unstarted
* gas tests: success: 449 (+146), failure: 0(-)
* ld tests: success: 367 (+6), failure: 0(-)
* Bottleneck now is suitable testing target - exploring use of University of Bologna model

* [Clang/LLVM](https://github.com/openhwgroup/core-v-sw/blob/master/projects/clang-llvm/2021/monthly-report-2021-02-08.md)

* Leads @asintzoff, @flip1995
* Passed concept proposal gate
* CVA6 yet to start
* CV32E40P MAC instructions added to integrated assembler. Builtin and compiler support work in progress
* lit tests: success 34380 (+46), failure 0(-)

* [FreeRTOS](https://github.com/openhwgroup/core-v-sw/blob/master/projects/freertos/2021/monthly-report-08-feb-21.md)

* Leads @balasr, @sshopova
* Passed concept proposal gate
* Work on component 1 as per PPL in progress
* Clean CORE-V version in [core-v-freertos](https://github.com/bluewww/core-v-freertos) on GitHub, work in progress to move under OpenHW organization
* Timer interrupts working with new configuration
* Disucssion in progress on CORE-V timer implementation.

Key points to note:

**IDE project (lead @ruspl-afed)**

* Now working with a secured connection to hardware at Quicklogic
* Basic welcome page now up

**GNU tools project (lead @jessicamills)**

* University of Bologna to carry out their work as Embecosm consultants to meet FSF copyright assignment requirements
* 17 tasks complete, 4 in progress, 13 unstarted
* gas tests: success: 449 (+146), failure: 0(-)
* ld tests: success: 367 (+6), failure: 0(-)
* Bottleneck now is suitable testing target - exploring use of University of Bologna model

**Clang/LLVM project (leads @asintzoff, @flip1995)**

* CVA6 yet to start
* CV32E40P MAC instructions added to integrated assembler. Builtin and compiler support work in progress
* lit tests: success 34380 (+46), failure 0(-)

**FreeRTOS project (leads @balasr, @sshopova)**

* Work on component 1 as per PPL in progress
* Clean CORE-V version in [core-v-freertos](https://github.com/bluewww/core-v-freertos) on GitHub, work in progress to move under OpenHW organization
* Timer interrupts working with new configuration
* Disucssion in progress on CORE-V timer implementation.

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