Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Software TG report to TWG on 28 June 2021. #421

Merged
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
90 changes: 90 additions & 0 deletions program/TG-reports-for-TWG/2021/20210628-sw-tg.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,90 @@
# Software TG Report June 2021

Presented to TWG meeting 28 June 2021.

## Actions from most recent meetings

There were two meetings this month on 14 June 2021 (main meeting) and 21 June
2021 (review HAL for TWG submission).

Actions from [minutes of 14 June 2021](https://github.com/openhwgroup/core-v-sw/blob/master/meetings/2021/2021-06-14-minutes.md)

**Jeremy Bennett** to remove Duncan Bees from PlatformIO project proposal updates as project concept is by Ivan Kravets.

**Duncan Bees** and **Yunhai Shang** to upload presentation to mattermost and github for people to offer edits and opinions. Including added slides depicting differences between the HAL and SDK projects.

**Rick O'Connor** to get HW & SW TG's together to decide what the SDK will include.

Actions from [minutes of 21 June 2021](https://github.com/openhwgroup/core-v-sw/blob/master/meetings/2021/2021-06-21-minutes.md)

**Yunhai Shang** to lead finalizing the HAL Project Concept document via a PR on GitHub, for submission to the TWG on 28 June 2021.

## Reports on active projects

Links to reports on four Software TG projects and one joint Software/Hardware TG project.

* [IDE report](https://github.com/openhwgroup/core-v-sw/blob/master/projects/ide/2021/monthly-report-2021-06-11.md)

* At Project Concept stage.
* This month: upgraded underlying components to later versions, made minor improvements.
* Next month: complete quests to run with OVPSim and to run on remote hardsware; investigate what simplistic application shoud look like.
* No risk register changes.

* [GNU Tools report](https://github.com/openhwgroup/core-v-sw/blob/master/projects/gnu-tools/2021/monthly-report-2021-06-14.md):

* At Project Concept stage.
* This month: integrating GCC regression testing with GVSoC; rebasing GNU repositories; working on blog post about using GVSoC.
* Next month: finalize GCC regression testing with GVSoC; merge post-increment/register-indexed load/store and immediate branching to binuils-gdb.
* No risk register changes.

* [Clang/LLVM Tools report](https://github.com/openhwgroup/core-v-sw/blob/master/projects/clang-llvm/2021/monthly-report-2021-06-14.md):

* At Project Concept stage.
* CVA6

* This month: check status of Clang+LLVM+LLD wrt. core-v-verif tests; key issues: floating-point, out-of-bound relocations
* Next month: finalize LLVM/core-v-verif evaluation; automate tool chain buids; basic benchmarking of speed and size.

* CV32E40P

* This month: port HW loop generation.
* Next month: automated builds of tool chain on Embecosm public buildbot; port builtins from Unviersity of Tübingen.

* No risk register changes.

* [FreeRTOS report](https://github.com/openhwgroup/core-v-sw/blob/master/projects/freertos/2021/monthly-report-14-june-21.md):

* At Project Concept stage.
* This month: regenerated bitstream; retested on Nexus A7-100T (timer interrupt, GPIO LED problems, basic programming examples are needed).
* Next month: update register definitions and hardware setup routine; continue work on Component 1.
* No risk register changes.

* [Verilator report](https://github.com/openhwgroup/core-v-docs/blob/master/hw/projects/verilator-model/2021/monthly-report-2021-06-15.md). Note that this is Hardware TG led project, so this is only a report on the software component.

* At Project Concept stage.
* This month: have top level wrapper with no tristate; can build model as library; [project plan](https://docs.google.com/spreadsheets/d/1Sl_GIklam3redWNj_DRVRVVBD49LvLD8k1zeFsJXllc/edit?usp=sharing) created; work in progress on JTAG TAP driver.
* Next month: complete JTAG TAP driver; start work on initial Embdebug port.
* [Risk register](https://docs.google.com/spreadsheets/d/1Sl_GIklam3redWNj_DRVRVVBD49LvLD8k1zeFsJXllc/edit?usp=sharing) created (as part of project plan spreadsheet).

## Upcoming projects

* **PlatformIO:** Contribution from PlatformIO Labs

* Currently on hold.

* **Hardware Abstraction Layer**

* Project Concept stage under consderation at TWG 28 June 2021.
* Latest [report on work to date](https://github.com/openhwgroup/core-v-sw/blob/master/projects/hal/2021/monthly-report-2021-06-14.md)

* This month: captured draft requirements, initial industry competitive comparison copleted; draft Project Concept proposal in preparation;
* Next month: gain TWG approval; start work on initial stages of project.

* **Requirements for CORE-V MCU developer board SDK**

* Initial discussion started, joint Hardware and Software TG meeting to be arranged to agree contents.

* **Linux integration**

* CVA6 now supports Linux.
* In due course a project to manage Linux for CORE-V devices will be required.