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Restructured dashboard for review by TWG #612
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| CORE-V-L1DCACHE | TRL 5 | PL | [C�sar Fuguet](https://github.com/cfuguet) | [cv-hpdcache](https://github.com/openhwgroup/cv-hpdcache) | 22.06.27 (A) | 23.02.27 (A) | | | | [CORE-V L1 DACHE PC](https://github.com/openhwgroup/programs/blob/master/Project-Descriptions-and-Plans/CORE-V-L1-DCACHE/20220523-OHG-ProjectConcept-CEA_L1_Dcache.md) [CORE-V L1 DCACHE PL](https://github.com/openhwgroup/programs/blob/master/Project-Descriptions-and-Plans/CORE-V-L1-DCACHE/20221214-ProjectLaunch-CEA_L1_Dcache.md) | | | | | ||
| CORE-V WALLY | TRL 4 | PC | [David Harris](https://github.com/davidharrishmc) | [cvw](https://github.com/openhwgroup/cvw) | 23.02.27 (A) | | | | | [Project Concept](https://github.com/openhwgroup/programs/blob/master/Project-Descriptions-and-Plans/CORE-V-WALLY/Project-Concept-OpenHW-Wally.pdf) | | | | | ||
| CORE-V CVA6-H | TRL 5 | PC | "Bruno Sa, Sandro Pinto" | integrated within CVA6 | 23.02.27 (A) | | | | | [CVA6-H PC presentation](https://docs.google.com/presentation/d/1mkl5KSRtpkGT18YbUadwtFZjMNdz3euX/edit#slide=id.g1b965471e2e_0_515) | | | | | ||
| Name | TRL Target | Status | TPL or PM | Repo | PC | PL | PA | PF Estimate | Project Docs | RTD | Project Plan | Project Board | |
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This table does not render properly on GitHub.
| CORE-V-TRUSTED-MCU | TRL 7 (CPU) | PC | Abdoulaye Berthe | | 22.07.25 (A) | | | | | [CORE-V-MCU2 Project Concept](https://docs.google.com/document/d/1nW9rFAFHhNkNi53khY3hhynXaHIm4OqJ/edit) | | | | | ||
## Active HW TG Projects | ||
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| Name | Status | TPL or PM | Repo | PC | PL | PA | PF Estimate | Project Docs | RTD | Project Plan | Project Board | |
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This table does not render properly on GitHub.
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Huh @MikeOpenHWGroup These render properly on a chrome markdown viewer. Not sure the issue...
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Removing the gap fixed the table.
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