Adding CV32E40Pv2 Design issues list #668
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Hi @mike
Here is the file listing ALL v1.8.0 design issues, either documentation, simulation, lint/coding/style or formal verification, created after cv32e40p_v1.0.0 tag end of 2020.
It is mentioning their status and there are still 4 opened in cv32e40p repo.
2 are about lint warnings and RTL coding style that I think could be closed.
1 is about Hardware Loops single-stepping using a real physical debugger connection. No way to reproduce and maybe only concerning openocd or PULP debug modules problems. I don't know how to manage this one wrt the "freeze".
Last one (612) is a question about potential RTL problem. But as cv32e40p_prefetch_controller is fully covered without any waiver, this is either not visible performance problem or not a valid comment/question?
Thanks to help to decide about those opened issues.
Regards,
Pascal.