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8346235: RISC-V: Optimize bitwise AND with mask values #22752
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Looks good!
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Looks good to me.
And tier1 passed on SOPHON SG2042 (release)
@feilongjiang @zifeihan : Thanks for having a look! Since this removes an unnecessary |
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Thanks!
Suggest:
/reviewer remove Abu2rkii
And report?
@robehn Only the author (@RealFYang) is allowed to issue the |
/reviewer remove Abu2rkii |
@RealFYang Could not parse
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/reviewer remove @Abu2rkii |
@RealFYang Could not parse
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Sorry, maybe you don't need to :) |
I don't think reviewers without OpenJDK IDs will be listed in the git commit message. So we should be fine. |
Hi, please review this small optimization and cleanup change.
This optimizes bitwise AND with immediate mask values like 0xFFFF and 0xFFFFFFFF. Currently, we do
andi
for these cases emitting 3 or 4 instructions repectively. These are effectively zero extensions and could be reduced to 1 or 2 instructions repectively depending on whether Zba and Zbb extensions are available.This also renames existing assembler routines
zero_extend
/sign_extend
tozext
/sext
. This will be more consistent with mnemonic names likesext.h
andzext.h
for zero/sign extension as specified by the RISC-V bit-manipulation spec. The various callsites look better to me after the renaming as the old names are much longer than other basic instructions.Testing: tier1-3 and gtest:all are clean on Premier-P550 SBC running Ubuntu-24.04.
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Using
git
Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/22752/head:pull/22752
$ git checkout pull/22752
Update a local copy of the PR:
$ git checkout pull/22752
$ git pull https://git.openjdk.org/jdk.git pull/22752/head
Using Skara CLI tools
Checkout this PR locally:
$ git pr checkout 22752
View PR using the GUI difftool:
$ git pr show -t 22752
Using diff file
Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/22752.diff
Using Webrev
Link to Webrev Comment