Merge

.jcheck/conf

@@ -34,4 +34,4 @@ version=0
 domain=openjdk.org
 
 [checks "whitespace"]
-files=.*\.java$|.*\.cpp$|.*\.hpp$|.*\.c$|.*\.h$
+files=.*\.cpp|.*\.hpp|.*\.c|.*\.h|.*\.java|.*\.cc|.*\.hh|.*\.m|.*\.mm

make/hotspot/lib/JvmFeatures.gmk

@@ -119,7 +119,9 @@ ifneq ($(call check-jvm-feature, cds), true)
       archiveBuilder.cpp \
       archiveUtils.cpp \
       classListParser.cpp \
+      classLoaderDataShared.cpp \
       classLoaderExt.cpp \
+      cppVtables.cpp \
       dumpAllocStats.cpp \
       dynamicArchive.cpp \
       filemap.cpp \

make/hotspot/symbols/symbols-unix

@@ -205,6 +205,7 @@ JVM_AddModuleExports
 JVM_AddModuleExportsToAll
 JVM_AddModuleExportsToAllUnnamed
 JVM_AddReadsModule
+JVM_DefineArchivedModules
 JVM_DefineModule
 JVM_SetBootLoaderUnnamedModule
 

make/scripts/generate-symbol-data.sh

@@ -63,7 +63,7 @@ if [ ! -f symbols ] ; then
     exit 1
 fi;
 
-if [ "`hg status .`x" != "x" ] ; then
+if [ "`git status --porcelain=v1 .`x" != "x" ] ; then
     echo "The make/data/symbols directory contains local changes!" >&2
     exit 1
 fi;

src/hotspot/cpu/aarch64/aarch64.ad

@@ -614,8 +614,8 @@ alloc_class chunk3(RFLAGS);
 // Several register classes are automatically defined based upon information in
 // this architecture description.
 // 1) reg_class inline_cache_reg           ( /* as def'd in frame section */ )
-// 2) reg_class compiler_method_oop_reg    ( /* as def'd in frame section */ )
-// 2) reg_class interpreter_method_oop_reg ( /* as def'd in frame section */ )
+// 2) reg_class compiler_method_reg        ( /* as def'd in frame section */ )
+// 2) reg_class interpreter_method_reg     ( /* as def'd in frame section */ )
 // 3) reg_class stack_slots( /* one chunk of stack-based "registers" */ )
 //
 
@@ -2410,12 +2410,6 @@ const int Matcher::float_pressure(int default_pressure_threshold) {
   return default_pressure_threshold;
 }
 
-int Matcher::regnum_to_fpu_offset(int regnum)
-{
-  Unimplemented();
-  return 0;
-}
-
 // Is this branch offset short enough that a short branch can be used?
 //
 // NOTE: If the platform does not provide any short branch variants, then
@@ -4043,17 +4037,14 @@ encode %{
 //         SP meets the minimum alignment.
 
 frame %{
-  // What direction does stack grow in (assumed to be same for C & Java)
-  stack_direction(TOWARDS_LOW);
-
   // These three registers define part of the calling convention
   // between compiled code and the interpreter.
 
   // Inline Cache Register or Method for I2C.
   inline_cache_reg(R12);
 
-  // Method Oop Register when calling interpreter.
-  interpreter_method_oop_reg(R12);
+  // Method Register when calling interpreter.
+  interpreter_method_reg(R12);
 
   // Number of stack slots consumed by locking an object
   sync_stack_slots(2);
@@ -5622,9 +5613,9 @@ operand inline_cache_RegP(iRegP reg)
   interface(REG_INTER);
 %}
 
-operand interpreter_method_oop_RegP(iRegP reg)
+operand interpreter_method_RegP(iRegP reg)
 %{
-  constraint(ALLOC_IN_RC(method_reg)); // interpreter_method_oop_reg
+  constraint(ALLOC_IN_RC(method_reg)); // interpreter_method_reg
   match(reg);
   match(iRegPNoSp);
   op_cost(0);

src/hotspot/cpu/aarch64/gc/shared/barrierSetNMethod_aarch64.cpp

@@ -101,7 +101,7 @@ void BarrierSetNMethod::deoptimize(nmethod* nm, address* return_address_ptr) {
 
   frame_pointers_t *new_frame = (frame_pointers_t *)(return_address_ptr - 5);
 
-  JavaThread *thread = (JavaThread*)Thread::current();
+  JavaThread *thread = JavaThread::current();
   RegisterMap reg_map(thread, false);
   frame frame = thread->last_frame();
 
@@ -111,14 +111,11 @@ void BarrierSetNMethod::deoptimize(nmethod* nm, address* return_address_ptr) {
 
   LogTarget(Trace, nmethod, barrier) out;
   if (out.is_enabled()) {
-    Thread* thread = Thread::current();
-    assert(thread->is_Java_thread(), "must be JavaThread");
-    JavaThread* jth = (JavaThread*) thread;
     ResourceMark mark;
     log_trace(nmethod, barrier)("deoptimize(nmethod: %s(%p), return_addr: %p, osr: %d, thread: %p(%s), making rsp: %p) -> %p",
                                 nm->method()->name_and_sig_as_C_string(),
-                                nm, *(address *) return_address_ptr, nm->is_osr_method(), jth,
-                                jth->get_thread_name(), frame.sp(), nm->verified_entry_point());
+                                nm, *(address *) return_address_ptr, nm->is_osr_method(), thread,
+                                thread->get_thread_name(), frame.sp(), nm->verified_entry_point());
   }
 
   new_frame->sp = frame.sp();

src/hotspot/cpu/aarch64/globals_aarch64.hpp

@@ -75,13 +75,11 @@ define_pd_global(intx, InitArrayShortSize, BytesPerLong);
 define_pd_global(intx, InlineSmallCode,          1000);
 #endif
 
-#define ARCH_FLAGS(develop, \
-                   product, \
-                   diagnostic, \
-                   experimental, \
-                   notproduct, \
-                   range, \
-                   constraint) \
+#define ARCH_FLAGS(develop,                                             \
+                   product,                                             \
+                   notproduct,                                          \
+                   range,                                               \
+                   constraint)                                          \
                                                                         \
   product(bool, NearCpool, true,                                        \
          "constant pool is close to instructions")                      \
@@ -113,4 +111,6 @@ define_pd_global(intx, InlineSmallCode,          1000);
           "Value -1 means off.")                                        \
           range(-1, 4096)
 
+// end of ARCH_FLAGS
+
 #endif // CPU_AARCH64_GLOBALS_AARCH64_HPP

src/hotspot/cpu/arm/arm.ad

@@ -997,10 +997,6 @@ const int Matcher::float_pressure(int default_pressure_threshold) {
   return default_pressure_threshold;
 }
 
-int Matcher::regnum_to_fpu_offset(int regnum) {
-  return regnum - 32; // The FP registers are in the second chunk
-}
-
 // Vector width in bytes
 const int Matcher::vector_width_in_bytes(BasicType bt) {
   return MaxVectorSize;
@@ -1664,13 +1660,10 @@ encode %{
 //         the region from SP to FP meets the minimum stack alignment.
 
 frame %{
-  // What direction does stack grow in (assumed to be same for native & Java)
-  stack_direction(TOWARDS_LOW);
-
   // These two registers define part of the calling convention
   // between compiled code and the interpreter.
   inline_cache_reg(R_Ricklass);          // Inline Cache Register or Method* for I2C
-  interpreter_method_oop_reg(R_Rmethod); // Method Oop Register when calling interpreter
+  interpreter_method_reg(R_Rmethod);     // Method Register when calling interpreter
 
   // Optional: name the operand used by cisc-spilling to access [stack_pointer + offset]
   cisc_spilling_operand_name(indOffset);
@@ -2530,7 +2523,7 @@ operand inline_cache_regP(iRegP reg) %{
   interface(REG_INTER);
 %}
 
-operand interpreter_method_oop_regP(iRegP reg) %{
+operand interpreter_method_regP(iRegP reg) %{
   constraint(ALLOC_IN_RC(Rmethod_regP));
   match(reg);
   format %{ %}

src/hotspot/cpu/arm/arm_32.ad

@@ -196,7 +196,7 @@ alloc_class chunk2(APSR, FPSCR);
 // Several register classes are automatically defined based upon information in
 // this architecture description.
 // 1) reg_class inline_cache_reg           ( as defined in frame section )
-// 2) reg_class interpreter_method_oop_reg ( as defined in frame section )
+// 2) reg_class interpreter_method_reg     ( as defined in frame section )
 // 3) reg_class stack_slots( /* one chunk of stack-based "registers" */ )
 //
 

src/hotspot/cpu/arm/globals_arm.hpp

@@ -70,11 +70,12 @@ define_pd_global(bool, CompactStrings, false);
 
 define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
 
-#define ARCH_FLAGS(develop, \
-                   product, \
-                   diagnostic, \
-                   experimental, \
-                   notproduct, \
-                   range, \
+#define ARCH_FLAGS(develop,     \
+                   product,     \
+                   notproduct,  \
+                   range,       \
                    constraint)
+
+// end of ARCH_FLAGS
+
 #endif // CPU_ARM_GLOBALS_ARM_HPP

src/hotspot/cpu/ppc/c2_init_ppc.cpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2018 SAP SE. All rights reserved.
+ * Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2020 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -40,12 +40,6 @@ void Compile::pd_compiler2_init() {
     }
   }
 
-  if (PowerArchitecturePPC64 == 6) {
-    if (FLAG_IS_DEFAULT(InsertEndGroupPPC64)) {
-      FLAG_SET_ERGO(InsertEndGroupPPC64, true);
-    }
-  }
-
   if (!VM_Version::has_isel() && FLAG_IS_DEFAULT(ConditionalMoveLimit)) {
     FLAG_SET_ERGO(ConditionalMoveLimit, 0);
   }

src/hotspot/cpu/ppc/globals_ppc.hpp

@@ -75,13 +75,11 @@ define_pd_global(bool, CompactStrings, true);
 define_pd_global(intx, InitArrayShortSize, 9*BytesPerLong);
 
 // Platform dependent flag handling: flags only defined on this platform.
-#define ARCH_FLAGS(develop,      \
-                   product,      \
-                   diagnostic,   \
-                   experimental, \
-                   notproduct,   \
-                   range,        \
-                   constraint)   \
+#define ARCH_FLAGS(develop,                                                 \
+                   product,                                                 \
+                   notproduct,                                              \
+                   range,                                                   \
+                   constraint)                                              \
                                                                             \
   product(uintx, PowerArchitecturePPC64, 0,                                 \
           "Specify the PowerPC family version in use. If not provided, "    \
@@ -136,12 +134,6 @@ define_pd_global(intx, InitArrayShortSize, 9*BytesPerLong);
   product(bool, UseStaticBranchPredictionForUncommonPathsPPC64, false,      \
           "Use static branch prediction hints for uncommon paths.")         \
                                                                             \
-  product(bool, UsePower6SchedulerPPC64, false,                             \
-          "Use Power6 Scheduler.")                                          \
-                                                                            \
-  product(bool, InsertEndGroupPPC64, false,                                 \
-          "Insert EndGroup instructions to optimize for Power6.")           \
-                                                                            \
   /* Trap based checks. */                                                  \
   /* Trap based checks use the ppc trap instructions to check certain */    \
   /* conditions. This instruction raises a SIGTRAP caught by the      */    \
@@ -161,7 +153,7 @@ define_pd_global(intx, InitArrayShortSize, 9*BytesPerLong);
   product(bool, UseRTMLocking, false,                                       \
           "Enable RTM lock eliding for inflated locks in compiled code")    \
                                                                             \
-  experimental(bool, UseRTMForStackLocks, false,                            \
+  product(bool, UseRTMForStackLocks, false, EXPERIMENTAL,                   \
           "Enable RTM lock eliding for stack locks in compiled code")       \
                                                                             \
   product(bool, UseRTMDeopt, false,                                         \
@@ -171,33 +163,35 @@ define_pd_global(intx, InitArrayShortSize, 9*BytesPerLong);
           "Number of RTM retries on lock abort or busy")                    \
           range(0, max_jint)                                                \
                                                                             \
-  experimental(int, RTMSpinLoopCount, 100,                                  \
+  product(int, RTMSpinLoopCount, 100, EXPERIMENTAL,                         \
           "Spin count for lock to become free before RTM retry")            \
           range(0, 32767) /* immediate operand limit on ppc */              \
                                                                             \
-  experimental(int, RTMAbortThreshold, 1000,                                \
+  product(int, RTMAbortThreshold, 1000, EXPERIMENTAL,                       \
           "Calculate abort ratio after this number of aborts")              \
           range(0, max_jint)                                                \
                                                                             \
-  experimental(int, RTMLockingThreshold, 10000,                             \
+  product(int, RTMLockingThreshold, 10000, EXPERIMENTAL,                    \
           "Lock count at which to do RTM lock eliding without "             \
           "abort ratio calculation")                                        \
           range(0, max_jint)                                                \
                                                                             \
-  experimental(int, RTMAbortRatio, 50,                                      \
+  product(int, RTMAbortRatio, 50, EXPERIMENTAL,                             \
           "Lock abort ratio at which to stop use RTM lock eliding")         \
           range(0, 100) /* natural range */                                 \
                                                                             \
-  experimental(int, RTMTotalCountIncrRate, 64,                              \
+  product(int, RTMTotalCountIncrRate, 64, EXPERIMENTAL,                     \
           "Increment total RTM attempted lock count once every n times")    \
           range(1, 32767) /* immediate operand limit on ppc */              \
           constraint(RTMTotalCountIncrRateConstraintFunc,AfterErgo)         \
                                                                             \
-  experimental(intx, RTMLockingCalculationDelay, 0,                         \
+  product(intx, RTMLockingCalculationDelay, 0, EXPERIMENTAL,                \
           "Number of milliseconds to wait before start calculating aborts " \
           "for RTM locking")                                                \
                                                                             \
-  experimental(bool, UseRTMXendForLockBusy, true,                           \
-          "Use RTM Xend instead of Xabort when lock busy")                  \
+  product(bool, UseRTMXendForLockBusy, true, EXPERIMENTAL,                  \
+          "Use RTM Xend instead of Xabort when lock busy")
+
+// end of ARCH_FLAGS
 
 #endif // CPU_PPC_GLOBALS_PPC_HPP