Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

chore: make handling of LOADW4 / STOREW4 / HINT_STOREW4 uniform #1230

Merged
merged 2 commits into from
Jan 17, 2025
Merged

chore: make handling of LOADW4 / STOREW4 / HINT_STOREW4 uniform #1230

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
57bc69c
chore: make handling of LOADW4 / STOREW4 / HINT_STOREW4 uniform
yi-sun Jan 17, 2025
cea79c9
fix: offset
yi-sun Jan 17, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 6 additions & 8 deletions extensions/native/circuit/src/adapters/loadstore_native_adapter.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -238,22 +238,20 @@ impl<F: PrimeField32, const NUM_CELLS: usize> VmAdapterChip<F>

let (data_read_as, data_write_as) = {
match local_opcode {
LOADW | LOADW4 => (e, d),
STOREW | STOREW4 | HINT_STOREW | HINT_STOREW4 => (d, e),
LOADW => (e, d),
STOREW | HINT_STOREW => (d, e),
}
};
let (data_read_ptr, data_write_ptr) = {
match local_opcode {
LOADW | LOADW4 => (read_cell.1 + b, a),
STOREW | STOREW4 | HINT_STOREW | HINT_STOREW4 => (a, read_cell.1 + b),
LOADW => (read_cell.1 + b, a),
STOREW | HINT_STOREW => (a, read_cell.1 + b),
}
};

let data_read = match local_opcode {
HINT_STOREW | HINT_STOREW4 => None,
LOADW | LOADW4 | STOREW | STOREW4 => {
Some(memory.read::<NUM_CELLS>(data_read_as, data_read_ptr))
}
HINT_STOREW => None,
LOADW | STOREW => Some(memory.read::<NUM_CELLS>(data_read_as, data_read_ptr)),
};
let record = NativeLoadStoreReadRecord {
pointer_read: read_cell.0,
Expand Down
16 changes: 6 additions & 10 deletions extensions/native/circuit/src/extension.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,8 +17,8 @@ use openvm_instructions::{
};
use openvm_native_compiler::{
CastfOpcode, FieldArithmeticOpcode, FieldExtensionOpcode, FriOpcode, NativeBranchEqualOpcode,
NativeJalOpcode, NativeLoadStoreOpcode, NativePhantom, BLOCK_LOAD_STORE_OPCODES,
BLOCK_LOAD_STORE_SIZE, SINGLE_LOAD_STORE_OPCODES,
NativeJalOpcode, NativeLoadStore4Opcode, NativeLoadStoreOpcode, NativePhantom,
BLOCK_LOAD_STORE_SIZE,
};
use openvm_poseidon2_air::Poseidon2Config;
use openvm_rv32im_circuit::{
Expand Down Expand Up @@ -124,19 +124,17 @@ impl<F: PrimeField32> VmExtension<F> for Native {

inventory.add_executor(
load_store_chip,
SINGLE_LOAD_STORE_OPCODES
.iter()
.map(|&opcode| VmOpcode::with_default_offset(opcode)),
NativeLoadStoreOpcode::iter().map(VmOpcode::with_default_offset),
)?;

let mut block_load_store_chip = NativeLoadStoreChip::<F, BLOCK_LOAD_STORE_SIZE>::new(
NativeLoadStoreAdapterChip::new(
execution_bus,
program_bus,
memory_bridge,
NativeLoadStoreOpcode::default_offset(),
NativeLoadStore4Opcode::default_offset(),
),
NativeLoadStoreCoreChip::new(NativeLoadStoreOpcode::default_offset()),
NativeLoadStoreCoreChip::new(NativeLoadStore4Opcode::default_offset()),
offline_memory.clone(),
);
block_load_store_chip
Expand All @@ -145,9 +143,7 @@ impl<F: PrimeField32> VmExtension<F> for Native {

inventory.add_executor(
block_load_store_chip,
BLOCK_LOAD_STORE_OPCODES
.iter()
.map(|&opcode| VmOpcode::with_default_offset(opcode)),
NativeLoadStore4Opcode::iter().map(VmOpcode::with_default_offset),
)?;

let branch_equal_chip = NativeBranchEqChip::new(
Expand Down
46 changes: 12 additions & 34 deletions extensions/native/circuit/src/loadstore/core.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -10,10 +10,7 @@ use openvm_circuit::arch::{
};
use openvm_circuit_primitives_derive::AlignedBorrow;
use openvm_instructions::instruction::Instruction;
use openvm_native_compiler::{
NativeLoadStoreOpcode, BLOCK_LOAD_STORE_OPCODES, BLOCK_LOAD_STORE_SIZE,
SINGLE_LOAD_STORE_OPCODES,
};
use openvm_native_compiler::NativeLoadStoreOpcode;
use openvm_stark_backend::{
interaction::InteractionBuilder,
p3_air::BaseAir,
Expand All @@ -22,6 +19,7 @@ use openvm_stark_backend::{
};
use serde::{Deserialize, Serialize};
use serde_big_array::BigArray;
use strum::IntoEnumIterator;

use super::super::adapters::loadstore_native_adapter::NativeLoadStoreInstruction;

Expand Down Expand Up @@ -86,17 +84,12 @@ where
});
builder.assert_bool(is_valid.clone());

let expected_opcode = flags
.iter()
.zip(match NUM_CELLS {
1 => SINGLE_LOAD_STORE_OPCODES,
BLOCK_LOAD_STORE_SIZE => BLOCK_LOAD_STORE_OPCODES,
_ => panic!("Unsupported number of cells: {}", NUM_CELLS),
})
.fold(AB::Expr::ZERO, |acc, (flag, opcode)| {
acc + (*flag).into() * AB::Expr::from_canonical_usize(opcode.as_usize())
})
+ AB::Expr::from_canonical_usize(self.offset);
let expected_opcode = flags.iter().zip(NativeLoadStoreOpcode::iter()).fold(
AB::Expr::ZERO,
|acc, (flag, local_opcode)| {
acc + (*flag).into() * AB::Expr::from_canonical_usize(local_opcode.as_usize())
},
) + AB::Expr::from_canonical_usize(self.offset);

AdapterAirContext {
to_pc: None,
Expand Down Expand Up @@ -152,10 +145,7 @@ where
NativeLoadStoreOpcode::from_usize(opcode.local_opcode_idx(self.air.offset));
let (pointer_read, data_read) = reads.into();

let data_write = if (NUM_CELLS == 1 && local_opcode == NativeLoadStoreOpcode::HINT_STOREW)
|| (NUM_CELLS == BLOCK_LOAD_STORE_SIZE
&& local_opcode == NativeLoadStoreOpcode::HINT_STOREW4)
{
let data_write = if local_opcode == NativeLoadStoreOpcode::HINT_STOREW {
let mut streams = self.streams.get().unwrap().lock().unwrap();
if streams.hint_stream.len() < NUM_CELLS {
return Err(ExecutionError::HintOutOfBounds { pc: from_pc });
Expand Down Expand Up @@ -184,21 +174,9 @@ where

fn generate_trace_row(&self, row_slice: &mut [F], record: Self::Record) {
let cols: &mut NativeLoadStoreCoreCols<_, NUM_CELLS> = row_slice.borrow_mut();
match NUM_CELLS {
1 => {
cols.is_loadw = F::from_bool(record.opcode == NativeLoadStoreOpcode::LOADW);
cols.is_storew = F::from_bool(record.opcode == NativeLoadStoreOpcode::STOREW);
cols.is_hint_storew =
F::from_bool(record.opcode == NativeLoadStoreOpcode::HINT_STOREW);
}
BLOCK_LOAD_STORE_SIZE => {
cols.is_loadw = F::from_bool(record.opcode == NativeLoadStoreOpcode::LOADW4);
cols.is_storew = F::from_bool(record.opcode == NativeLoadStoreOpcode::STOREW4);
cols.is_hint_storew =
F::from_bool(record.opcode == NativeLoadStoreOpcode::HINT_STOREW4);
}
_ => panic!("Unsupported number of cells: {}", NUM_CELLS),
}
cols.is_loadw = F::from_bool(record.opcode == NativeLoadStoreOpcode::LOADW);
cols.is_storew = F::from_bool(record.opcode == NativeLoadStoreOpcode::STOREW);
cols.is_hint_storew = F::from_bool(record.opcode == NativeLoadStoreOpcode::HINT_STOREW);

cols.pointer_read = record.pointer_read;
cols.data_read = record.data_read;
Expand Down
8 changes: 4 additions & 4 deletions extensions/native/compiler/src/conversion/mod.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ use serde::{Deserialize, Serialize};
use crate::{
asm::{AsmInstruction, AssemblyCode},
FieldArithmeticOpcode, FieldExtensionOpcode, FriOpcode, NativeBranchEqualOpcode,
NativeJalOpcode, NativeLoadStoreOpcode, NativePhantom,
NativeJalOpcode, NativeLoadStore4Opcode, NativeLoadStoreOpcode, NativePhantom,
};

#[derive(Clone, Copy, Debug, Serialize, Deserialize)]
Expand Down Expand Up @@ -345,7 +345,7 @@ fn convert_instruction<F: PrimeField32, EF: ExtensionField<F>>(
AsmInstruction::LoadEI(dst, src, index, size, offset) => vec![
// mem[dst] <- mem[mem[src] + index * size + offset]
inst(
options.opcode_with_offset(NativeLoadStoreOpcode::LOADW4),
options.opcode_with_offset(NativeLoadStore4Opcode(NativeLoadStoreOpcode::LOADW)),
i32_f(dst),
index * size + offset,
i32_f(src),
Expand All @@ -367,7 +367,7 @@ fn convert_instruction<F: PrimeField32, EF: ExtensionField<F>>(
AsmInstruction::StoreEI(val, addr, index, size, offset) => vec![
// mem[mem[addr] + index * size + offset] <- mem[val]
inst(
options.opcode_with_offset(NativeLoadStoreOpcode::STOREW4),
options.opcode_with_offset(NativeLoadStore4Opcode(NativeLoadStoreOpcode::STOREW)),
i32_f(val),
index * size + offset,
i32_f(addr),
Expand Down Expand Up @@ -519,7 +519,7 @@ fn convert_instruction<F: PrimeField32, EF: ExtensionField<F>>(
AS::Native,
)],
AsmInstruction::StoreHintExtI(val, offset) => vec![inst(
options.opcode_with_offset(NativeLoadStoreOpcode::HINT_STOREW4),
options.opcode_with_offset(NativeLoadStore4Opcode(NativeLoadStoreOpcode::HINT_STOREW)),
F::ZERO,
offset,
i32_f(val),
Expand Down
23 changes: 9 additions & 14 deletions extensions/native/compiler/src/lib.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -48,22 +48,17 @@ pub enum NativeLoadStoreOpcode {
STOREW,
/// Instruction to write the next hint word into memory.
HINT_STOREW,
LOADW4,
STOREW4,
HINT_STOREW4,
}

pub const SINGLE_LOAD_STORE_OPCODES: [NativeLoadStoreOpcode; 3] = [
NativeLoadStoreOpcode::LOADW,
NativeLoadStoreOpcode::STOREW,
NativeLoadStoreOpcode::HINT_STOREW,
];

pub const BLOCK_LOAD_STORE_OPCODES: [NativeLoadStoreOpcode; 3] = [
NativeLoadStoreOpcode::LOADW4,
NativeLoadStoreOpcode::STOREW4,
NativeLoadStoreOpcode::HINT_STOREW4,
];
#[derive(Copy, Clone, Debug, UsizeOpcode)]
#[opcode_offset = 0x108]
pub struct NativeLoadStore4Opcode(pub NativeLoadStoreOpcode);

impl NativeLoadStore4Opcode {
pub fn iter() -> impl Iterator<Item = Self> {
NativeLoadStoreOpcode::iter().map(Self)
}
}

pub const BLOCK_LOAD_STORE_SIZE: usize = 4;

Expand Down