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Linux ppc64le ieee128 compat: Do not redefine __asm on external headers #14384

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Jan 13, 2023
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44 changes: 20 additions & 24 deletions module/zfs/vdev_raidz_math_powerpc_altivec_common.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,10 +26,6 @@
#include <sys/types.h>
#include <sys/simd.h>

#ifdef __linux__
#define __asm __asm__ __volatile__
#endif

#define _REG_CNT(_0, _1, _2, _3, _4, _5, _6, _7, N, ...) N
#define REG_CNT(r...) _REG_CNT(r, 8, 7, 6, 5, 4, 3, 2, 1)

Expand Down Expand Up @@ -142,7 +138,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 8: \
__asm( \
__asm__ __volatile__( \
"lvx 21,0,%[SRC0]\n" \
"lvx 20,0,%[SRC1]\n" \
"lvx 19,0,%[SRC2]\n" \
Expand Down Expand Up @@ -172,7 +168,7 @@ typedef struct v {
: "v18", "v19", "v20", "v21"); \
break; \
case 4: \
__asm( \
__asm__ __volatile__( \
"lvx 21,0,%[SRC0]\n" \
"lvx 20,0,%[SRC1]\n" \
"lvx 19,0,%[SRC2]\n" \
Expand All @@ -189,7 +185,7 @@ typedef struct v {
: "v18", "v19", "v20", "v21"); \
break; \
case 2: \
__asm( \
__asm__ __volatile__( \
"lvx 21,0,%[SRC0]\n" \
"lvx 20,0,%[SRC1]\n" \
"vxor " VR0(r) "," VR0(r) ",21\n" \
Expand All @@ -208,7 +204,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 8: \
__asm( \
__asm__ __volatile__( \
"vxor " VR4(r) "," VR4(r) "," VR0(r) "\n" \
"vxor " VR5(r) "," VR5(r) "," VR1(r) "\n" \
"vxor " VR6(r) "," VR6(r) "," VR2(r) "\n" \
Expand All @@ -217,7 +213,7 @@ typedef struct v {
: RVR0(r), RVR1(r), RVR2(r), RVR3(r)); \
break; \
case 4: \
__asm( \
__asm__ __volatile__( \
"vxor " VR2(r) "," VR2(r) "," VR0(r) "\n" \
"vxor " VR3(r) "," VR3(r) "," VR1(r) "\n" \
: UVR2(r), UVR3(r) \
Expand All @@ -232,7 +228,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 8: \
__asm( \
__asm__ __volatile__( \
"vxor " VR0(r) "," VR0(r) "," VR0(r) "\n" \
"vxor " VR1(r) "," VR1(r) "," VR1(r) "\n" \
"vxor " VR2(r) "," VR2(r) "," VR2(r) "\n" \
Expand All @@ -245,15 +241,15 @@ typedef struct v {
WVR4(r), WVR5(r), WVR6(r), WVR7(r)); \
break; \
case 4: \
__asm( \
__asm__ __volatile__( \
"vxor " VR0(r) "," VR0(r) "," VR0(r) "\n" \
"vxor " VR1(r) "," VR1(r) "," VR1(r) "\n" \
"vxor " VR2(r) "," VR2(r) "," VR2(r) "\n" \
"vxor " VR3(r) "," VR3(r) "," VR3(r) "\n" \
: WVR0(r), WVR1(r), WVR2(r), WVR3(r)); \
break; \
case 2: \
__asm( \
__asm__ __volatile__( \
"vxor " VR0(r) "," VR0(r) "," VR0(r) "\n" \
"vxor " VR1(r) "," VR1(r) "," VR1(r) "\n" \
: WVR0(r), WVR1(r)); \
Expand All @@ -267,7 +263,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 8: \
__asm( \
__asm__ __volatile__( \
"vor " VR4(r) "," VR0(r) "," VR0(r) "\n" \
"vor " VR5(r) "," VR1(r) "," VR1(r) "\n" \
"vor " VR6(r) "," VR2(r) "," VR2(r) "\n" \
Expand All @@ -276,7 +272,7 @@ typedef struct v {
: RVR0(r), RVR1(r), RVR2(r), RVR3(r)); \
break; \
case 4: \
__asm( \
__asm__ __volatile__( \
"vor " VR2(r) "," VR0(r) "," VR0(r) "\n" \
"vor " VR3(r) "," VR1(r) "," VR1(r) "\n" \
: WVR2(r), WVR3(r) \
Expand All @@ -291,7 +287,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 8: \
__asm( \
__asm__ __volatile__( \
"lvx " VR0(r) " ,0,%[SRC0]\n" \
"lvx " VR1(r) " ,0,%[SRC1]\n" \
"lvx " VR2(r) " ,0,%[SRC2]\n" \
Expand All @@ -312,7 +308,7 @@ typedef struct v {
[SRC7] "r" ((OFFSET(src, 112)))); \
break; \
case 4: \
__asm( \
__asm__ __volatile__( \
"lvx " VR0(r) " ,0,%[SRC0]\n" \
"lvx " VR1(r) " ,0,%[SRC1]\n" \
"lvx " VR2(r) " ,0,%[SRC2]\n" \
Expand All @@ -324,7 +320,7 @@ typedef struct v {
[SRC3] "r" ((OFFSET(src, 48)))); \
break; \
case 2: \
__asm( \
__asm__ __volatile__( \
"lvx " VR0(r) " ,0,%[SRC0]\n" \
"lvx " VR1(r) " ,0,%[SRC1]\n" \
: WVR0(r), WVR1(r) \
Expand All @@ -340,7 +336,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 8: \
__asm( \
__asm__ __volatile__( \
"stvx " VR0(r) " ,0,%[DST0]\n" \
"stvx " VR1(r) " ,0,%[DST1]\n" \
"stvx " VR2(r) " ,0,%[DST2]\n" \
Expand All @@ -362,7 +358,7 @@ typedef struct v {
: "memory"); \
break; \
case 4: \
__asm( \
__asm__ __volatile__( \
"stvx " VR0(r) " ,0,%[DST0]\n" \
"stvx " VR1(r) " ,0,%[DST1]\n" \
"stvx " VR2(r) " ,0,%[DST2]\n" \
Expand All @@ -375,7 +371,7 @@ typedef struct v {
: "memory"); \
break; \
case 2: \
__asm( \
__asm__ __volatile__( \
"stvx " VR0(r) " ,0,%[DST0]\n" \
"stvx " VR1(r) " ,0,%[DST1]\n" \
: : [DST0] "r" ((OFFSET(dst, 0))), \
Expand All @@ -400,7 +396,7 @@ typedef struct v {

#define MUL2_SETUP() \
{ \
__asm( \
__asm__ __volatile__( \
"vspltisb " VR(16) ",14\n" \
"vspltisb " VR(17) ",15\n" \
"vaddubm " VR(16) "," VR(17) "," VR(16) "\n" \
Expand All @@ -412,7 +408,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 4: \
__asm( \
__asm__ __volatile__( \
"vcmpgtsb 19," VR(17) "," VR0(r) "\n" \
"vcmpgtsb 18," VR(17) "," VR1(r) "\n" \
"vcmpgtsb 21," VR(17) "," VR2(r) "\n" \
Expand All @@ -434,7 +430,7 @@ typedef struct v {
: "v18", "v19", "v20", "v21"); \
break; \
case 2: \
__asm( \
__asm__ __volatile__( \
"vcmpgtsb 19," VR(17) "," VR0(r) "\n" \
"vcmpgtsb 18," VR(17) "," VR1(r) "\n" \
"vand 19,19," VR(16) "\n" \
Expand Down Expand Up @@ -478,7 +474,7 @@ typedef struct v {
{ \
switch (REG_CNT(r)) { \
case 2: \
__asm( \
__asm__ __volatile__( \
/* lts for upper part */ \
"vspltisb 15,15\n" \
"lvx 10,0,%[lt0]\n" \
Expand Down