Merge pull request #115 from os-fpga/blocking_to_nonblocking_ram_tran… #457

	name: Surelog Synlig GHDL Workflow

	on:
	push:
	pull_request:

	jobs:
	linux-gcc:
	name: ${{ matrix.mode }}

	runs-on: ubuntu-latest
	defaults:
	run:
	shell: bash
	strategy:
	fail-fast: false
	matrix:
	mode:
	- basic_test
	env:
	MODE: ${{ matrix.mode }}

	steps:

	- name: Cancel previous
	uses: styfle/cancel-workflow-action@0.11.0
	with:
	access_token: ${{ github.token }}

	- name: Setup Python
	uses: actions/setup-python@v4
	with:
	python-version: 3.8
	architecture: x64

	- name: Setup Python Packages
	run: \|
	pip3 install orderedmultidict
	pip3 install psutil

	- name: Checkout code
	uses: actions/checkout@v4
	with:
	submodules: true
	fetch-depth: 1

	- name: Checkout submodules
	run: \|
	cd parser_plugins/synlig
	echo $PWD
	ls
	git submodule sync
	git submodule update --depth 3 --init --recursive --checkout \
	./third_party/{surelog,yosys} \
	;

	- name: Install dependencies
	run: \|
	sudo apt-get install cmake build-essential g++-11 gcc-11 tclsh tcl-dev tcllib cmake
	- name: Synlig_GHDL_Plugins_Ubuntu
	if: matrix.mode == 'basic_test'
	shell: bash
	run: \|
	cd parser_plugins
	make CPU_CORES=2
	cd ..
	cd netlist_bitblast
	make CPU_CORES=2
	make test

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