Move away from llvm_asm to new asm.

In my opinion, this makes the constraints a _lot_ easier to read, and gets us things like noreturn. (Plus, it moves us off a deprecated feature whose days are numbered.) asm has opinions about trying to use r11. These opinions are misguided: rust-lang/rust#73450 However, we respect them by manually moving values in and out of r11 in the asm sequences.
oxidecomputer · Jun 19, 2020 · 57603ad · 57603ad
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commit 57603ad
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Showing 11 changed files with 192 additions and 160 deletions.
diff --git a/Cargo.lock b/Cargo.lock
diff --git a/demo/src/main.rs b/demo/src/main.rs
@@ -1,6 +1,5 @@
 #![no_std]
 #![no_main]
-#![feature(llvm_asm)]
 
 #[cfg(not(any(feature = "panic-itm", feature = "panic-semihosting")))]
 compile_error!(

diff --git a/kern/src/arch/arm_m.rs b/kern/src/arch/arm_m.rs
@@ -567,19 +567,16 @@ pub fn start_first_task(task: &task::Task) -> ! {
     }
 
     unsafe {
-        llvm_asm! { "
-            msr PSP, $0             @ set the user stack pointer
-            ldm $1, {r4-r11}        @ restore the callee-save registers
+        asm!("
+            msr PSP, {user_sp}      @ set the user stack pointer
+            ldm {task}, {{r4-r11}}  @ restore the callee-save registers
             svc #0xFF               @ branch into user mode (svc # ignored)
             udf #0xad               @ should not return
-        "
-            :
-            : "r"(task.save.psp),
-              "r"(&task.save.r4)
-            : "memory"
-            : "volatile"
-        }
-        core::hint::unreachable_unchecked()
+            ",
+            user_sp = in(reg) task.save.psp,
+            task = in(reg) &task.save.r4,
+            options(noreturn),
+        )
     }
 }
 
@@ -593,7 +590,7 @@ pub unsafe extern "C" fn SVCall() {
     // of instructions below, though the precise details depend on how complex
     // of an M-series processor you're targeting -- so I've punted on this for
     // the time being.
-    llvm_asm! {"
+    asm!("
         cmp lr, #0xFFFFFFF9     @ is it coming from inside the kernel?
         beq 1f                  @ if so, we're starting the first task;
                                 @ jump ahead.
@@ -608,7 +605,7 @@ pub unsafe extern "C" fn SVCall() {
         @ fetching into r12 means the order in the stm below is right.
         mrs r12, PSP
         @ now, store volatile registers, plus the PSP in r12, plus LR.
-        stm r1, {r4-r12, lr}
+        stm r1, {{r4-r12, lr}}
 
         @ syscall number is passed in r11. Move it into r0 to pass it as an
         @ argument to the handler, then call the handler.
@@ -620,7 +617,7 @@ pub unsafe extern "C" fn SVCall() {
         movt r0, #:upper16:CURRENT_TASK_PTR
         ldr r0, [r0]
         @ restore volatile registers, plus load PSP into r12
-        ldm r0, {r4-r12, lr}
+        ldm r0, {{r4-r12, lr}}
         msr PSP, r12
 
         @ resume
@@ -636,12 +633,9 @@ pub unsafe extern "C" fn SVCall() {
                                 @ return into thread mode, PSP, FP on
 
         bx lr                   @ branch into user mode
-        "
-        :
-        :
-        :
-        : "volatile"
-    }
+        ",
+        options(noreturn),
+    )
 }
 
 /// Manufacture a mutable/exclusive reference to the task table from thin air
@@ -745,7 +739,7 @@ fn pend_context_switch_from_isr() {
 #[naked]
 #[no_mangle]
 pub unsafe extern "C" fn PendSV() {
-    llvm_asm! {"
+    asm!("
         @ store volatile state.
         @ first, get a pointer to the current task.
         movw r0, #:lower16:CURRENT_TASK_PTR
@@ -755,7 +749,7 @@ pub unsafe extern "C" fn PendSV() {
         @ fetching into r12 means the order in the stm below is right.
         mrs r12, PSP
         @ now, store volatile registers, plus the PSP in r12, plus LR.
-        stm r1, {r4-r12, lr}
+        stm r1, {{r4-r12, lr}}
 
         @ syscall number is passed in r11. Move it into r0 to pass it as an
         @ argument to the handler, then call the handler.
@@ -766,17 +760,14 @@ pub unsafe extern "C" fn PendSV() {
         movt r0, #:upper16:CURRENT_TASK_PTR
         ldr r0, [r0]
         @ restore volatile registers, plus load PSP into r12
-        ldm r0, {r4-r12, lr}
+        ldm r0, {{r4-r12, lr}}
         msr PSP, r12
 
         @ resume
         bx lr
-        "
-        :
-        :
-        :
-        : "volatile"
-    }
+        ",
+        options(noreturn),
+    );
 }
 
 /// The Rust side of the PendSV handler, after all volatile registers have been
@@ -803,10 +794,11 @@ pub unsafe extern "C" fn DefaultHandler() {
     // We can cheaply get the identity of the interrupt that called us from the
     // bottom 9 bits of IPSR.
     let mut ipsr: u32;
-    llvm_asm! {
-        "mrs $0, IPSR"
-        : "=r"(ipsr)
-    }
+    asm!(
+        "mrs {}, IPSR",
+        out(reg) ipsr,
+        options(pure, nomem, preserves_flags, nostack),
+    );
     let exception_num = ipsr & 0x1FF;
 
     // The first 16 exceptions are architecturally defined; vendor hardware
@@ -882,7 +874,7 @@ pub fn enable_irq(n: u32) {
 #[no_mangle]
 #[naked]
 pub unsafe extern "C" fn MemoryManagement() {
-    llvm_asm! { "
+    asm!("
         @ Get the exc_return value into an argument register, which is
         @ difficult to do from higher-level code.
         mov r0, lr
@@ -891,9 +883,9 @@ pub unsafe extern "C" fn MemoryManagement() {
         movt r1, #:upper16:CURRENT_TASK_PTR
         ldr r1, [r1]
         b mem_manage_fault
-        "
-        ::::"volatile"
-    }
+        ",
+        options(noreturn),
+    );
 }
 
 bitflags::bitflags! {

diff --git a/kern/src/lib.rs b/kern/src/lib.rs
@@ -23,7 +23,7 @@
 //!    most clever algorithms used in kernels wind up requiring `unsafe`.)
 
 #![cfg_attr(target_os = "none", no_std)]
-#![feature(llvm_asm)]
+#![feature(asm)]
 #![feature(naked_functions)]
 
 #[macro_use]

diff --git a/lpc55/src/main.rs b/lpc55/src/main.rs
@@ -1,6 +1,5 @@
 #![no_std]
 #![no_main]
-#![feature(llvm_asm)]
 
 #[cfg(not(any(feature = "panic-itm", feature = "panic-semihosting")))]
 compile_error!(

diff --git a/rust-toolchain b/rust-toolchain
@@ -1 +1 @@
-nightly-2020-05-01
+nightly-2020-06-10
diff --git a/task-idle/Cargo.toml b/task-idle/Cargo.toml
@@ -8,6 +8,7 @@ edition = "2018"
 # suppress default features to avoid including panic message collection, to
 # ensure the idle task remains tiny.
 userlib = {path = "../userlib", default-features = false}
+cortex-m = {version = "0.6", features = ["inline-asm"]}
 
 [features]
 default = ["standalone"]

diff --git a/task-idle/src/main.rs b/task-idle/src/main.rs
@@ -1,6 +1,5 @@
 #![no_std]
 #![no_main]
-#![feature(llvm_asm)]
 
 // Make sure we actually link in userlib, despite not using any of it explicitly
 // - we need it for our _start routine.
@@ -9,11 +8,8 @@ extern crate userlib;
 #[export_name = "main"]
 fn main() -> ! {
     loop {
-        // Safety: asm in general is unsafe, but this instruction is fine.
-        unsafe {
-            // Wait For Interrupt to pause the processor until an ISR arrives,
-            // which could wake some higher-priority task.
-            llvm_asm!("wfi"::::"volatile");
-        }
+        // Wait For Interrupt to pause the processor until an ISR arrives,
+        // which could wake some higher-priority task.
+        cortex_m::asm::wfi();
     }
 }
diff --git a/task-ping/src/main.rs b/task-ping/src/main.rs
@@ -1,6 +1,5 @@
 #![no_std]
 #![no_main]
-#![feature(llvm_asm)]
 
 use userlib::*;
 

diff --git a/task-spam2/src/main.rs b/task-spam2/src/main.rs
@@ -1,6 +1,5 @@
 #![no_std]
 #![no_main]
-#![feature(llvm_asm)]
 
 // Make sure we actually link in userlib, despite not using any of it explicitly
 // - we need it for our _start routine.