[bmv2] Unexpected modification of variable's value

[vikramnathan]

Relevant code with debug "print" statements:

register<bit<32>>(32w100) debug;
register<bit<32>>(32w1) reg;

action test() {
    Value val = {0};

    bool _pred = (val.field1 != 0);
    bit<32> inc = _pred ? 32w1 : 0;
    debug.write(0, _pred ? 32w1 : 32w0); // Print _pred
    debug.write(1, inc);                 // Print inc
    val.field1 = 32w1;
    debug.write(2, _pred ? 32w1 : 0);    // Print _pred again
    debug.write(3, inc);                 // Print inc again

    reg.write(32w0, val.field1);
}

Expected output reading debug from CLI:

debug[0] = 0
debug[1] = 0
debug[2] = 0
debug[3] = 0

Observed output:

debug[0] = 0
debug[1] = 0
debug[2] = 1
debug[3] = 1

This seems to suggest that updating val.field1 also updated inc and _pred, even though both were set several lines earlier. My hunch is that this is a compiler issue.

Source p4 and json:
test_bug4.json.txt
test_bug4.p4.txt

[mihaibudiu]

@ChrisDodd: I think that this is a problem with the LocalCopyPropagation.
Code before LCP:

        val.field1 = 32w0;
        tmp_2 = val.field1 != 32w0;
        _pred = tmp_2;
        {
            bool cond;
            {
                bool pred;
                cond = _pred;
                pred = cond;
                tmp_3 = (pred ? 32w1 : tmp_3);
                cond = !cond;
                pred = cond;
                tmp_3 = (pred ? 32w0 : tmp_3);
            }
        }
        inc = tmp_3;
        {
            bool cond_0;
            {
                bool pred_0;
                cond_0 = _pred;
                pred_0 = cond_0;
                tmp_4 = (pred_0 ? 32w1 : tmp_4);
                cond_0 = !cond_0;
                pred_0 = cond_0;
                tmp_4 = (pred_0 ? 32w0 : tmp_4);
            }
        }
        debug.write(32w0, tmp_4);
        debug.write(32w1, inc);
        val.field1 = 32w1;
        debug.write(32w2, inc);
        reg.write(32w0, val.field1);

Code after LCP:

val.field1 = 32w0;
        tmp_2 = val.field1 != 32w0;
        _pred = val.field1 != 32w0;
        {
            {
                tmp_3 = (val.field1 != 32w0 ? 32w1 : tmp_3);
                tmp_3 = (!(val.field1 != 32w0) ? 32w0 : (val.field1 != 32w0 ? 32w1 : tmp_3));
            }
        }
        inc = (!(val.field1 != 32w0) ? 32w0 : (val.field1 != 32w0 ? 32w1 : tmp_3));
        {
            {
                tmp_4 = (val.field1 != 32w0 ? 32w1 : tmp_4);
                tmp_4 = (!(val.field1 != 32w0) ? 32w0 : (val.field1 != 32w0 ? 32w1 : tmp_4));
            }
        }
        debug.write(32w0, (!(val.field1 != 32w0) ? 32w0 : (val.field1 != 32w0 ? 32w1 : tmp_4)));
        debug.write(32w1, (!(val.field1 != 32w0) ? 32w0 : (val.field1 != 32w0 ? 32w1 : tmp_3)));
        val.field1 = 32w1;
        debug.write(32w2, (!(val.field1 != 32w0) ? 32w0 : (val.field1 != 32w0 ? 32w1 : tmp_3)));
        reg.write(32w0, val.field1);

The issue seems to be that val.field1 is assigned to, but this does not invalidate inc, which does depend on val.field1.

[vikramnathan]

Verified as fixed.