Decouple Staking and Election

[kianenigma]

PR review walkthrough video recording, slightly outdated, but still useful.

Problem

This is a major step toward reducing the technical debt of the bloated (mostly by me) staking pallet. A big component that is currently baked into staking is the election mechanism. This PR will decouple election and staking, allowing the election to happen (with whatever mechanism it may have) in a separate logical unit, and the results are communicated back to staking.

Solution

A new, potentially multi-pallet crate is introduced, called frame-election-providers. This crate contains different entities that can provide generic election functionality to pallets. To signal this, each of them needs to implement the ElectionProvider trait. Current PR provides two implementations:

1. OnChainSequentialPhragmen, which is a stateless struct that does election on the fly.
2. TwoPhaseElection, which is a stateful pallet that does the election in a more complicated process, as described in Tracking issue for next generation pallet-staking and elections #6242 .

In the future, I plan to experiment with a new one called MultiBlockSequentialPhragmen, and if it works, it can solve a lot of future performance issues.

The crux of the work finishes here. Albeit, many complications arise that I will discuss next.

Problems, Discussions

• API design. We have two broad types of election providers: First, those that work on the fly. Second, those that need some data ahead of time, and some blocks later will have the result ready. Currently, I express this with an auxiliary trait, called ElectionDataProvider.

After some consideration and interations, I've settled for a design in which we assume all elections are stateful. This has no implication on the stateless elections, expcet that they need a separate medium to communicate the election date, beause the main fn elect() takes no parameters.

To make this a bit more strict, each ElectionPrivder must have a type DataProvider: ElectionDataProvider. Further documentation and examples of this is provided in primitives/election-providers.

• Reward amount.
  How much should we reward the best solution? Ideally, this should be proportional to the amount of improvement to the min-staker that the solution provides (score[0]) Given that we mint the reward out of thin air, I am worried that if there is a flaw, someone can use it to gain a lot of money. For now, I added a configurable MaxReward. This should ensure that even in case of bugs, this cannot be abused.

• Weighing. The two_phase pallet is very challenging to be weighed correctly. An interesting example is closing the signed phase. We cannot know how many of the queued solutions need to go through a feasibility check. The on_initialize weight is also fairly complicated, and I am still not sure if it is good enough.

• Deposit: Speaking of weight, I think this is the first pallet that will attempt to reserve a deposit for future weight consumption. In detail, a signed submission should reserve a ratio of its future feasibility_check weight. This will get slashed if the solution is not valid.

• Challenge phase: We still don't check for a solution to be PJR, because it is too expensive to do so for now. An easy solution to this is to introduce a short challenge phase. While checking PJR on-chain is hard, it is quite easy to submit a proof to the chain to claim that a solution is not PJR. Ideally, we should have such a phase as well. I probably won't do it in this PR though.

• Deployment: This is quite tricky to deploy, as it deeply alters staking. I recently had an idea about how to deploy this: I can revert these changes in staking, and only add new code in this PR. We let old-staking run next to two_phase and probably compare the solutions offchain to make sure they are both sane. Then, we progress by switching the staking into using an ElectionProvider.

[kianenigma]

/benchmark runtime pallet pallet_two_phase_election_provider

[kianenigma]

/benchmark runtime pallet pallet_two_phase_election_provider

[parity-benchapp]

Finished benchmark for branch: kiz-election-provider

Benchmark: Benchmark Runtime Pallet

cargo run --release --features=runtime-benchmarks --manifest-path=bin/node/cli/Cargo.toml -- benchmark --chain=dev --steps=50 --repeat=20 --pallet=pallet_two_phase_election_provider --extrinsic="*" --execution=wasm --wasm-execution=compiled --heap-pages=4096 --output=./frame/two-phase-election-provider/src/weights.rs --template=./.maintain/frame-weight-template.hbs

Results

Pallet: "pallet_two_phase_election_provider", Extrinsic: "on_initialize_nothing", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 21.28
µs

Reads = 7
Writes = 0
Min Squares Analysis

-- Extrinsic Time --

Model:
Time ~= 21.28
µs

Reads = 7
Writes = 0
Pallet: "pallet_two_phase_election_provider", Extrinsic: "on_initialize_open_signed", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 74.22
µs

Reads = 7
Writes = 4
Min Squares Analysis

-- Extrinsic Time --

Model:
Time ~= 74.22
µs

Reads = 7
Writes = 4
Pallet: "pallet_two_phase_election_provider", Extrinsic: "on_initialize_open_unsigned", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 76.1
µs

Reads = 8
Writes = 4
Min Squares Analysis

-- Extrinsic Time --

Model:
Time ~= 76.1
µs

Reads = 8
Writes = 4
Pallet: "pallet_two_phase_election_provider", Extrinsic: "finalize_signed_phase_accept_solution", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 38.08
µs

Reads = 1
Writes = 2
Min Squares Analysis

-- Extrinsic Time --

Model:
Time ~= 38.08
µs

Reads = 1
Writes = 2
Pallet: "pallet_two_phase_election_provider", Extrinsic: "finalize_signed_phase_reject_solution", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 17.12
µs

Reads = 1
Writes = 1
Min Squares Analysis

-- Extrinsic Time --

Model:
Time ~= 17.12
µs

Reads = 1
Writes = 1
Pallet: "pallet_two_phase_election_provider", Extrinsic: "submit", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 52.41
+ c 3.392
µs

Reads = 3 + (0 * c)
Writes = 1 + (0 * c)
Min Squares Analysis

-- Extrinsic Time --

Data points distribution:
c mean µs sigma µs %
1 55.66 0.221 0.3%
2 58.79 0.147 0.2%
3 62.68 0.25 0.3%
4 66.63 0.134 0.2%
5 69.65 0.102 0.1%
6 72.37 0.176 0.2%
7 75.49 0.151 0.2%
8 79.88 0.128 0.1%
9 82.93 0.13 0.1%

Quality and confidence:
param error
c 0.017

Model:
Time ~= 52.37
+ c 3.395
µs

Reads = 3 + (0 * c)
Writes = 1 + (0 * c)
Pallet: "pallet_two_phase_election_provider", Extrinsic: "submit_unsigned", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 0
+ v 2.66
+ t 0.064
+ a 10.73
+ d 5.181
µs

Reads = 6 + (0 * v) + (0 * t) + (0 * a) + (0 * d)
Writes = 1 + (0 * v) + (0 * t) + (0 * a) + (0 * d)
Min Squares Analysis

-- Extrinsic Time --

Data points distribution:
v t a d mean µs sigma µs %
2000 800 1500 400 22660 39.85 0.1%
2020 800 1500 400 22770 49.16 0.2%
2040 800 1500 400 22800 67.02 0.2%
2060 800 1500 400 22870 49.28 0.2%
2080 800 1500 400 22840 31.53 0.1%
2100 800 1500 400 22990 32.35 0.1%
2120 800 1500 400 23000 56.11 0.2%
2140 800 1500 400 23020 47.04 0.2%
2160 800 1500 400 23170 36.39 0.1%
2180 800 1500 400 23190 40.58 0.1%
2200 800 1500 400 23290 79.22 0.3%
2220 800 1500 400 23270 31.46 0.1%
2240 800 1500 400 23380 25.19 0.1%
2260 800 1500 400 23450 14.22 0.0%
2280 800 1500 400 23450 33.41 0.1%
2300 800 1500 400 23510 27.49 0.1%
2320 800 1500 400 23590 27.6 0.1%
2340 800 1500 400 23610 37.98 0.1%
2360 800 1500 400 23630 59.49 0.2%
2380 800 1500 400 23710 37.34 0.1%
2400 800 1500 400 23860 103.1 0.4%
2420 800 1500 400 23900 57.45 0.2%
2440 800 1500 400 23830 30.9 0.1%
2460 800 1500 400 23870 39.63 0.1%
2480 800 1500 400 24060 63.14 0.2%
2500 800 1500 400 24070 31.47 0.1%
2520 800 1500 400 24070 56.8 0.2%
2540 800 1500 400 24080 41.53 0.1%
2560 800 1500 400 24300 70.5 0.2%
2580 800 1500 400 24320 39.43 0.1%
2600 800 1500 400 24290 37.81 0.1%
2620 800 1500 400 24360 29.41 0.1%
2640 800 1500 400 24500 27.82 0.1%
2660 800 1500 400 24530 77.32 0.3%
2680 800 1500 400 24490 49.15 0.2%
2700 800 1500 400 24530 71.24 0.2%
2720 800 1500 400 24650 37.86 0.1%
2740 800 1500 400 24880 109.9 0.4%
2760 800 1500 400 24720 40.41 0.1%
2780 800 1500 400 24700 58.63 0.2%
2800 800 1500 400 24860 42.88 0.1%
2820 800 1500 400 24880 45.9 0.1%
2840 800 1500 400 24880 62.69 0.2%
2860 800 1500 400 24910 60.59 0.2%
2880 800 1500 400 25080 68.56 0.2%
2900 800 1500 400 25110 81.78 0.3%
2920 800 1500 400 25080 33.62 0.1%
2940 800 1500 400 25220 40.66 0.1%
2960 800 1500 400 25310 34.35 0.1%
2980 800 1500 400 25320 36.02 0.1%
3000 500 1500 400 25290 46.37 0.1%
3000 506 1500 400 25340 64.53 0.2%
3000 512 1500 400 25340 69.47 0.2%
3000 518 1500 400 25360 21.09 0.0%
3000 524 1500 400 25380 44.57 0.1%
3000 530 1500 400 25390 53.23 0.2%
3000 536 1500 400 25370 14.44 0.0%
3000 542 1500 400 25270 33.2 0.1%
3000 548 1500 400 25310 45.69 0.1%
3000 554 1500 400 25430 68.7 0.2%
3000 560 1500 400 25320 56.87 0.2%
3000 566 1500 400 25400 34.53 0.1%
3000 572 1500 400 25310 28.63 0.1%
3000 578 1500 400 25450 153.5 0.6%
3000 584 1500 400 25350 36.49 0.1%
3000 590 1500 400 25320 36.08 0.1%
3000 596 1500 400 25320 42.39 0.1%
3000 602 1500 400 25350 55.51 0.2%
3000 608 1500 400 25340 45.33 0.1%
3000 614 1500 400 25380 27.14 0.1%
3000 620 1500 400 25360 16.75 0.0%
3000 626 1500 400 25310 22.93 0.0%
3000 632 1500 400 25330 38.1 0.1%
3000 638 1500 400 25360 56.01 0.2%
3000 644 1500 400 25300 44 0.1%
3000 650 1500 400 25350 46.41 0.1%
3000 656 1500 400 25320 30.37 0.1%
3000 662 1500 400 25460 61.96 0.2%
3000 668 1500 400 25420 56.17 0.2%
3000 674 1500 400 25330 35.14 0.1%
3000 680 1500 400 25380 48.18 0.1%
3000 686 1500 400 25340 42.29 0.1%
3000 692 1500 400 25330 25.07 0.0%
3000 698 1500 400 25360 44.3 0.1%
3000 704 1500 400 25340 37.85 0.1%
3000 710 1500 400 25340 39.37 0.1%
3000 716 1500 400 25400 46.95 0.1%
3000 722 1500 400 25310 54.75 0.2%
3000 728 1500 400 25320 45.28 0.1%
3000 734 1500 400 25400 60.23 0.2%
3000 740 1500 400 25430 108.5 0.4%
3000 746 1500 400 25370 43 0.1%
3000 752 1500 400 25350 57.92 0.2%
3000 758 1500 400 25300 37.87 0.1%
3000 764 1500 400 25370 52.07 0.2%
3000 770 1500 400 25420 45.63 0.1%
3000 776 1500 400 25310 30.95 0.1%
3000 782 1500 400 25320 24.51 0.0%
3000 788 1500 400 25370 55.57 0.2%
3000 794 1500 400 25510 89.19 0.3%
3000 800 500 400 14050 31.81 0.2%
3000 800 520 400 14340 58.79 0.4%
3000 800 540 400 14470 29.33 0.2%
3000 800 560 400 14740 93.62 0.6%
3000 800 580 400 14880 57.66 0.3%
3000 800 600 400 15060 48.64 0.3%
3000 800 620 400 15250 33.48 0.2%
3000 800 640 400 15440 40.92 0.2%
3000 800 660 400 15640 59.25 0.3%
3000 800 680 400 15820 34.84 0.2%
3000 800 700 400 16490 29.28 0.1%
3000 800 720 400 16740 46 0.2%
3000 800 740 400 16830 37.6 0.2%
3000 800 760 400 17070 38.26 0.2%
3000 800 780 400 17320 26.3 0.1%
3000 800 800 400 17510 27.42 0.1%
3000 800 820 400 17910 87.95 0.4%
3000 800 840 400 17970 43.03 0.2%
3000 800 860 400 18200 38.13 0.2%
3000 800 880 400 18420 36.21 0.1%
3000 800 900 400 18580 31.92 0.1%
3000 800 920 400 18930 135.3 0.7%
3000 800 940 400 19010 17.94 0.0%
3000 800 960 400 19240 39.11 0.2%
3000 800 980 400 19380 21.14 0.1%
3000 800 1000 400 19640 53.83 0.2%
3000 800 1020 400 19800 40.21 0.2%
3000 800 1040 400 20020 36.27 0.1%
3000 800 1060 400 20190 44.45 0.2%
3000 800 1080 400 20390 46.65 0.2%
3000 800 1100 400 20590 55.04 0.2%
3000 800 1120 400 20780 31.51 0.1%
3000 800 1140 400 20970 36.89 0.1%
3000 800 1160 400 21150 42.33 0.2%
3000 800 1180 400 21270 35.12 0.1%
3000 800 1200 400 21530 38.69 0.1%
3000 800 1220 400 21820 89.2 0.4%
3000 800 1240 400 21870 21.13 0.0%
3000 800 1260 400 22090 48.49 0.2%
3000 800 1280 400 22210 15.78 0.0%
3000 800 1300 400 22500 46.92 0.2%
3000 800 1320 400 22660 32.96 0.1%
3000 800 1340 400 22840 37.09 0.1%
3000 800 1360 400 23090 50 0.2%
3000 800 1380 400 23270 53.21 0.2%
3000 800 1400 400 23480 56.57 0.2%
3000 800 1420 400 23710 63.24 0.2%
3000 800 1440 400 24740 64.13 0.2%
3000 800 1460 400 24960 21.97 0.0%
3000 800 1480 400 25150 73.94 0.2%
3000 800 1500 200 24510 17 0.0%
3000 800 1500 204 24510 25.88 0.1%
3000 800 1500 208 24480 18.92 0.0%
3000 800 1500 212 24540 54.4 0.2%
3000 800 1500 216 24490 36.82 0.1%
3000 800 1500 220 24600 49.46 0.2%
3000 800 1500 224 24600 47.34 0.1%
3000 800 1500 228 24660 63.03 0.2%
3000 800 1500 232 24680 27.08 0.1%
3000 800 1500 236 24770 66.02 0.2%
3000 800 1500 240 24740 27.23 0.1%
3000 800 1500 244 25070 350.5 1.3%
3000 800 1500 248 24770 32.36 0.1%
3000 800 1500 252 24850 81.87 0.3%
3000 800 1500 256 24860 64.04 0.2%
3000 800 1500 260 24990 52.01 0.2%
3000 800 1500 264 25020 36.13 0.1%
3000 800 1500 268 25060 51.03 0.2%
3000 800 1500 272 25050 24.66 0.0%
3000 800 1500 276 25100 38.03 0.1%
3000 800 1500 280 25250 107.7 0.4%
3000 800 1500 284 25210 44.56 0.1%
3000 800 1500 288 25230 16.96 0.0%
3000 800 1500 292 25240 36.64 0.1%
3000 800 1500 296 25350 86.04 0.3%
3000 800 1500 300 25310 50.9 0.2%
3000 800 1500 304 25340 35.67 0.1%
3000 800 1500 308 25460 43.04 0.1%
3000 800 1500 312 25410 30.74 0.1%
3000 800 1500 316 25400 58.66 0.2%
3000 800 1500 320 25470 39.01 0.1%
3000 800 1500 324 25430 34.67 0.1%
3000 800 1500 328 25460 40.31 0.1%
3000 800 1500 332 25630 129.8 0.5%
3000 800 1500 336 25510 52.63 0.2%
3000 800 1500 340 25530 25.52 0.0%
3000 800 1500 344 25610 107.2 0.4%
3000 800 1500 348 25570 35.12 0.1%
3000 800 1500 352 25460 32.69 0.1%
3000 800 1500 356 25500 50.51 0.1%
3000 800 1500 360 25500 52.43 0.2%
3000 800 1500 364 25510 38.41 0.1%
3000 800 1500 368 25480 21.92 0.0%
3000 800 1500 372 25430 22.39 0.0%
3000 800 1500 376 25440 37.88 0.1%
3000 800 1500 380 25510 51.98 0.2%
3000 800 1500 384 25430 60.85 0.2%
3000 800 1500 388 25410 69.24 0.2%
3000 800 1500 392 25430 74.64 0.2%
3000 800 1500 396 25410 47.18 0.1%
3000 800 1500 400 25350 41.03 0.1%

Quality and confidence:
param error
v 0.021
t 0.072
a 0.021
d 0.108

Model:
Time ~= 0
+ v 2.606
+ t 0
+ a 11.4
+ d 2.651
µs

Reads = 6 + (0 * v) + (0 * t) + (0 * a) + (0 * d)
Writes = 1 + (0 * v) + (0 * t) + (0 * a) + (0 * d)
Pallet: "pallet_two_phase_election_provider", Extrinsic: "feasibility_check", Lowest values: [], Highest values: [], Steps: [50], Repeat: 20
Median Slopes Analysis

-- Extrinsic Time --

Model:
Time ~= 0
+ v 2.687
+ t 0.111
+ a 9.573
+ d 5.07
µs

Reads = 3 + (0 * v) + (0 * t) + (0 * a) + (0 * d)
Writes = 0 + (0 * v) + (0 * t) + (0 * a) + (0 * d)
Min Squares Analysis

-- Extrinsic Time --

Data points distribution:
v t a d mean µs sigma µs %
2000 800 1500 400 20410 25.17 0.1%
2020 800 1500 400 20440 33.39 0.1%
2040 800 1500 400 20480 27.72 0.1%
2060 800 1500 400 20560 20.3 0.0%
2080 800 1500 400 20590 25.91 0.1%
2100 800 1500 400 20670 33.13 0.1%
2120 800 1500 400 20710 32.57 0.1%
2140 800 1500 400 20710 31.33 0.1%
2160 800 1500 400 20880 46.4 0.2%
2180 800 1500 400 20960 42.47 0.2%
2200 800 1500 400 20910 20.32 0.0%
2220 800 1500 400 21000 29.31 0.1%
2240 800 1500 400 21070 13.02 0.0%
2260 800 1500 400 21260 77.33 0.3%
2280 800 1500 400 21150 19.65 0.0%
2300 800 1500 400 21250 36.07 0.1%
2320 800 1500 400 21360 36.25 0.1%
2340 800 1500 400 21410 39.1 0.1%
2360 800 1500 400 21410 39.49 0.1%
2380 800 1500 400 21520 39.31 0.1%
2400 800 1500 400 21530 51.79 0.2%
2420 800 1500 400 21660 20.28 0.0%
2440 800 1500 400 21570 29.1 0.1%
2460 800 1500 400 21630 37.08 0.1%
2480 800 1500 400 21750 27.86 0.1%
2500 800 1500 400 21770 34.36 0.1%
2520 800 1500 400 21800 39.55 0.1%
2540 800 1500 400 21910 84.77 0.3%
2560 800 1500 400 21900 22.29 0.1%
2580 800 1500 400 22110 40.06 0.1%
2600 800 1500 400 22030 19.84 0.0%
2620 800 1500 400 22090 58.43 0.2%
2640 800 1500 400 22190 28.73 0.1%
2660 800 1500 400 22260 64.17 0.2%
2680 800 1500 400 22230 32.7 0.1%
2700 800 1500 400 22280 38.46 0.1%
2720 800 1500 400 22410 47.02 0.2%
2740 800 1500 400 22530 108.4 0.4%
2760 800 1500 400 22460 65.86 0.2%
2780 800 1500 400 22510 41.58 0.1%
2800 800 1500 400 22610 38.27 0.1%
2820 800 1500 400 22800 130.3 0.5%
2840 800 1500 400 22630 44.89 0.1%
2860 800 1500 400 22740 79 0.3%
2880 800 1500 400 22750 23.09 0.1%
2900 800 1500 400 22910 49.18 0.2%
2920 800 1500 400 22830 31.34 0.1%
2940 800 1500 400 22930 55.21 0.2%
2960 800 1500 400 23010 38.04 0.1%
2980 800 1500 400 23070 38.2 0.1%
3000 500 1500 400 23050 46.7 0.2%
3000 506 1500 400 23060 59.09 0.2%
3000 512 1500 400 23050 44.61 0.1%
3000 518 1500 400 23060 79.1 0.3%
3000 524 1500 400 23060 35.84 0.1%
3000 530 1500 400 23030 30.5 0.1%
3000 536 1500 400 23050 18.53 0.0%
3000 542 1500 400 23080 46.01 0.1%
3000 548 1500 400 23010 23.77 0.1%
3000 554 1500 400 23000 22.22 0.0%
3000 560 1500 400 23040 38.01 0.1%
3000 566 1500 400 23090 44.22 0.1%
3000 572 1500 400 23050 23.99 0.1%
3000 578 1500 400 23070 23.11 0.1%
3000 584 1500 400 23150 46.38 0.2%
3000 590 1500 400 23010 40.74 0.1%
3000 596 1500 400 23050 44.32 0.1%
3000 602 1500 400 23050 56.42 0.2%
3000 608 1500 400 23040 37.1 0.1%
3000 614 1500 400 23140 27.06 0.1%
3000 620 1500 400 23030 23.32 0.1%
3000 626 1500 400 23040 32.19 0.1%
3000 632 1500 400 23100 38.4 0.1%
3000 638 1500 400 23100 48.58 0.2%
3000 644 1500 400 23040 34.7 0.1%
3000 650 1500 400 23110 53.03 0.2%
3000 656 1500 400 23090 57.56 0.2%
3000 662 1500 400 23110 59.3 0.2%
3000 668 1500 400 23140 102.7 0.4%
3000 674 1500 400 23010 31.7 0.1%
3000 680 1500 400 23100 47.83 0.2%
3000 686 1500 400 23080 59.73 0.2%
3000 692 1500 400 23140 76.87 0.3%
3000 698 1500 400 23060 38.55 0.1%
3000 704 1500 400 23040 19.37 0.0%
3000 710 1500 400 23040 24.13 0.1%
3000 716 1500 400 23060 38.97 0.1%
3000 722 1500 400 23050 51.18 0.2%
3000 728 1500 400 23110 52.32 0.2%
3000 734 1500 400 23070 42.21 0.1%
3000 740 1500 400 23130 56.91 0.2%
3000 746 1500 400 23110 39.29 0.1%
3000 752 1500 400 23130 59.22 0.2%
3000 758 1500 400 23120 39.54 0.1%
3000 764 1500 400 23120 37.98 0.1%
3000 770 1500 400 23120 49.54 0.2%
3000 776 1500 400 23030 28.73 0.1%
3000 782 1500 400 23040 20.04 0.0%
3000 788 1500 400 23100 49.35 0.2%
3000 794 1500 400 23050 21.65 0.0%
3000 800 500 400 13420 30.65 0.2%
3000 800 520 400 13720 63.11 0.4%
3000 800 540 400 13870 72.21 0.5%
3000 800 560 400 13970 27.12 0.1%
3000 800 580 400 14170 38.31 0.2%
3000 800 600 400 14550 108.7 0.7%
3000 800 620 400 14600 42.56 0.2%
3000 800 640 400 14760 21.21 0.1%
3000 800 660 400 14990 33.15 0.2%
3000 800 680 400 15210 43.64 0.2%
3000 800 700 400 15440 83.97 0.5%
3000 800 720 400 15560 27.18 0.1%
3000 800 740 400 15720 29.98 0.1%
3000 800 760 400 15930 23.37 0.1%
3000 800 780 400 16200 27.05 0.1%
3000 800 800 400 16380 27.31 0.1%
3000 800 820 400 16580 22.58 0.1%
3000 800 840 400 16840 63.9 0.3%
3000 800 860 400 17070 44.78 0.2%
3000 800 880 400 17180 30.61 0.1%
3000 800 900 400 17440 49.52 0.2%
3000 800 920 400 17580 30.61 0.1%
3000 800 940 400 17820 44.42 0.2%
3000 800 960 400 18080 77.26 0.4%
3000 800 980 400 18170 23.25 0.1%
3000 800 1000 400 18330 19.65 0.1%
3000 800 1020 400 18570 46.96 0.2%
3000 800 1040 400 18910 85.23 0.4%
3000 800 1060 400 18960 17.09 0.0%
3000 800 1080 400 19140 44.28 0.2%
3000 800 1100 400 19320 33.25 0.1%
3000 800 1120 400 19490 23.97 0.1%
3000 800 1140 400 19660 42.15 0.2%
3000 800 1160 400 19830 22.14 0.1%
3000 800 1180 400 20000 56.76 0.2%
3000 800 1200 400 20230 52.42 0.2%
3000 800 1220 400 20380 33.18 0.1%
3000 800 1240 400 20550 47.96 0.2%
3000 800 1260 400 20840 97.29 0.4%
3000 800 1280 400 20900 24.91 0.1%
3000 800 1300 400 21090 31.23 0.1%
3000 800 1320 400 21290 39.34 0.1%
3000 800 1340 400 21530 75.34 0.3%
3000 800 1360 400 21710 64.48 0.2%
3000 800 1380 400 21890 61.82 0.2%
3000 800 1400 400 22070 51.72 0.2%
3000 800 1420 400 22300 32.68 0.1%
3000 800 1440 400 22470 50.84 0.2%
3000 800 1460 400 22620 40.4 0.1%
3000 800 1480 400 22890 47.09 0.2%
3000 800 1500 200 22270 42.59 0.1%
3000 800 1500 204 22240 47.27 0.2%
3000 800 1500 208 22180 11.78 0.0%
3000 800 1500 212 22250 59.76 0.2%
3000 800 1500 216 22300 53.06 0.2%
3000 800 1500 220 22370 65.5 0.2%
3000 800 1500 224 22290 41.12 0.1%
3000 800 1500 228 22350 39.92 0.1%
3000 800 1500 232 22350 42.99 0.1%
3000 800 1500 236 22450 37.55 0.1%
3000 800 1500 240 22480 70.78 0.3%
3000 800 1500 244 22470 23.12 0.1%
3000 800 1500 248 22510 29.73 0.1%
3000 800 1500 252 22530 52.88 0.2%
3000 800 1500 256 22540 38.1 0.1%
3000 800 1500 260 22690 23.83 0.1%
3000 800 1500 264 22680 30.43 0.1%
3000 800 1500 268 22930 134.4 0.5%
3000 800 1500 272 22780 41.66 0.1%
3000 800 1500 276 22880 50.13 0.2%
3000 800 1500 280 22850 36.95 0.1%
3000 800 1500 284 22900 41.07 0.1%
3000 800 1500 288 22980 46.85 0.2%
3000 800 1500 292 22980 41.19 0.1%
3000 800 1500 296 23040 56.58 0.2%
3000 800 1500 300 23080 57.36 0.2%
3000 800 1500 304 23080 70.41 0.3%
3000 800 1500 308 23130 34.25 0.1%
3000 800 1500 312 23110 42.93 0.1%
3000 800 1500 316 23110 24.82 0.1%
3000 800 1500 320 23170 34 0.1%
3000 800 1500 324 23180 32.52 0.1%
3000 800 1500 328 23210 55.46 0.2%
3000 800 1500 332 23190 42.49 0.1%
3000 800 1500 336 23170 27.19 0.1%
3000 800 1500 340 23290 58.36 0.2%
3000 800 1500 344 23230 27.08 0.1%
3000 800 1500 348 23240 41.32 0.1%
3000 800 1500 352 23200 39.63 0.1%
3000 800 1500 356 23250 58.12 0.2%
3000 800 1500 360 23230 60.9 0.2%
3000 800 1500 364 23200 18.94 0.0%
3000 800 1500 368 23200 33.6 0.1%
3000 800 1500 372 23230 39.17 0.1%
3000 800 1500 376 23120 28.63 0.1%
3000 800 1500 380 23190 50.67 0.2%
3000 800 1500 384 23120 29.98 0.1%
3000 800 1500 388 23110 34.06 0.1%
3000 800 1500 392 23180 63.24 0.2%
3000 800 1500 396 23090 57.49 0.2%
3000 800 1500 400 23060 42.99 0.1%

Quality and confidence:
param error
v 0.012
t 0.041
a 0.012
d 0.061

Model:
Time ~= 0
+ v 2.788
+ t 0.601
+ a 9.722
+ d 3.706
µs

Reads = 3 + (0 * v) + (0 * t) + (0 * a) + (0 * d)
Writes = 0 + (0 * v) + (0 * t) + (0 * a) + (0 * d)

[gui1117]

as discussed offline it should be great to have signed solution having a weight limit too, because once they are executed in on_initialize it mustn't take more than 1 block.

So in principle the signed solution maximum weight should be block_time/number_of_signed_solution_in_the_queue. I think we should move to one signed solution checked per block once the signed phase is finished, otherwise the weight limit is too low.

Actually the whole signed phase could have been done in a follow-up PR
ideally splitting this PR in 3 (support refactor, unsigned phase, signed phase).

[kianenigma]

This PR shall be frozen and I will try to split it into smaller pieces.

[kianenigma]

We're gonna stick to the split version, thus closed.