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_projects/armv7m7-imxrt117x-evkb: add separate project for iMX RT117x…
… EVKB board iMX RT117x EVK and EVKB board have significant differences (e.g. different Ethernet PHY), so they need to be configured separately. Also add lwip init script for iMX RT117x's ENET and ENET_1G interfaces. JIRA: RTOS-963
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/* | ||
* Phoenix-RTOS | ||
* | ||
* Board config for armv7m7-imxrt117x-evkb | ||
* | ||
* Copyright 2022, 2024 Phoenix Systems | ||
* Author: Lukasz Kosinski, Daniel Sawka | ||
* | ||
* This file is part of Phoenix-RTOS. | ||
* | ||
* %LICENSE% | ||
*/ | ||
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#ifndef _BOARD_CONFIG_H_ | ||
#define _BOARD_CONFIG_H_ | ||
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/* | ||
* libpseudodev and libposixsrv shall be used exclusively, libpseudodev uses | ||
* less resources, but libposixsrv provides POSIX support and may be resource | ||
* hungry, by default libposixsrv is enabled. | ||
*/ | ||
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/* #define PSEUDODEV 1 */ | ||
#define BUILTIN_POSIXSRV 1 | ||
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/* Peripherals */ | ||
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#define UART_CONSOLE 1 | ||
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/* UART */ | ||
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#define UART1 1 | ||
#define UART1_BAUDRATE 115200 | ||
#define UART1_BUFSIZE 512 | ||
#define UART1_TX_PIN ad_24 | ||
#define UART1_RX_PIN ad_25 | ||
#define UART1_HW_FLOWCTRL 0 | ||
#define UART1_RTS_PIN ad_27 | ||
#define UART1_CTS_PIN ad_26 | ||
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#define UART2 1 | ||
#define UART2_BAUDRATE 115200 | ||
#define UART2_BUFSIZE 512 | ||
#define UART2_TX_PIN disp_b2_10 | ||
#define UART2_RX_PIN disp_b2_11 | ||
#define UART2_HW_FLOWCTRL 0 | ||
#define UART2_RTS_PIN disp_b2_13 | ||
#define UART2_CTS_PIN disp_b2_12 | ||
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/* | ||
#define UART3 0 | ||
#define UART3_BAUDRATE 115200 | ||
#define UART3_BUFSIZE 512 | ||
#define UART3_TX_PIN ad_30 | ||
#define UART3_RX_PIN ad_31 | ||
#define UART3_HW_FLOWCTRL 0 | ||
#define UART3_RTS_PIN sd_b2_08 | ||
#define UART3_CTS_PIN sd_b2_07 | ||
#define UART4 0 | ||
#define UART4_BAUDRATE 115200 | ||
#define UART4_BUFSIZE 512 | ||
#define UART4_TX_PIN disp_b1_06 | ||
#define UART4_RX_PIN disp_b1_04 | ||
#define UART4_HW_FLOWCTRL 0 | ||
#define UART4_RTS_PIN disp_b1_07 | ||
#define UART4_CTS_PIN disp_b1_05 | ||
#define UART5 0 | ||
#define UART5_BAUDRATE 115200 | ||
#define UART5_BUFSIZE 512 | ||
#define UART5_TX_PIN ad_28 | ||
#define UART5_RX_PIN ad_29 | ||
#define UART5_HW_FLOWCTRL 0 | ||
#define UART5_RTS_PIN sd_b2_10 | ||
#define UART5_CTS_PIN sd_b2_09 | ||
#define UART6 0 | ||
#define UART6_BAUDRATE 115200 | ||
#define UART6_BUFSIZE 512 | ||
#define UART6_TX_PIN emc_b1_40 | ||
#define UART6_RX_PIN emc_b1_41 | ||
#define UART6_HW_FLOWCTRL 0 | ||
#define UART6_RTS_PIN emc_b2_01 | ||
#define UART6_CTS_PIN emc_b2_00 | ||
#define UART7 0 | ||
#define UART7_BAUDRATE 115200 | ||
#define UART7_BUFSIZE 512 | ||
#define UART7_TX_PIN disp_b2_06 | ||
#define UART7_RX_PIN disp_b2_07 | ||
#define UART7_HW_FLOWCTRL 0 | ||
#define UART7_RTS_PIN ad_03 | ||
#define UART7_CTS_PIN ad_02 | ||
#define UART8 0 | ||
#define UART8_BAUDRATE 115200 | ||
#define UART8_BUFSIZE 512 | ||
#define UART8_TX_PIN disp_b2_08 | ||
#define UART8_RX_PIN disp_b2_09 | ||
#define UART8_HW_FLOWCTRL 0 | ||
#define UART8_RTS_PIN ad_05 | ||
#define UART8_CTS_PIN ad_04 | ||
#define UART9 0 | ||
#define UART9_BAUDRATE 115200 | ||
#define UART9_BUFSIZE 512 | ||
#define UART9_TX_PIN sd_b2_00 | ||
#define UART9_RX_PIN sd_b2_01 | ||
#define UART9_HW_FLOWCTRL 0 | ||
#define UART9_RTS_PIN sd_b2_03 | ||
#define UART9_CTS_PIN sd_b2_02 | ||
#define UART10 0 | ||
#define UART10_BAUDRATE 115200 | ||
#define UART10_BUFSIZE 512 | ||
#define UART10_TX_PIN ad_15 | ||
#define UART10_RX_PIN ad_16 | ||
#define UART10_HW_FLOWCTRL 0 | ||
#define UART10_RTS_PIN ad_35 | ||
#define UART10_CTS_PIN ad_34 | ||
#define UART11 0 | ||
#define UART11_BAUDRATE 115200 | ||
#define UART11_BUFSIZE 512 | ||
#define UART11_TX_PIN lpsr_08 | ||
#define UART11_RX_PIN lpsr_09 | ||
#define UART11_HW_FLOWCTRL 0 | ||
#define UART11_RTS_PIN lpsr_11 | ||
#define UART11_CTS_PIN lpsr_10 | ||
#define UART12 0 | ||
#define UART12_BAUDRATE 115200 | ||
#define UART12_BUFSIZE 512 | ||
#define UART12_TX_PIN lpsr_00 | ||
#define UART12_RX_PIN lpsr_01 | ||
#define UART12_HW_FLOWCTRL 0 | ||
#define UART12_RTS_PIN lpsr_04 | ||
#define UART12_CTS_PIN lpsr_05 | ||
*/ | ||
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/* SPI */ | ||
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/* | ||
#define SPI1 0 | ||
#define SPI1_SCK ad_28 | ||
#define SPI1_SDO ad_30 | ||
#define SPI1_SDI ad_31 | ||
#define SPI1_PCS0 ad_29 | ||
#define SPI1_PCS1 ad_18 | ||
#define SPI1_PCS2 ad_19 | ||
#define SPI1_PCS3 ad_20 | ||
#define SPI2 0 | ||
#define SPI2_SCK sd_b2_07 | ||
#define SPI2_SDO sd_b2_09 | ||
#define SPI2_SDI sd_b2_10 | ||
#define SPI2_PCS0 sd_b2_08 | ||
#define SPI2_PCS1 sd_b2_11 | ||
#define SPI2_PCS2 ad_22 | ||
#define SPI2_PCS3 ad_23 | ||
#define SPI3 0 | ||
#define SPI3_SCK disp_b1_04 | ||
#define SPI3_SDO disp_b1_06 | ||
#define SPI3_SDI disp_b1_05 | ||
#define SPI3_PCS0 disp_b1_07 | ||
#define SPI3_PCS1 disp_b1_08 | ||
#define SPI3_PCS2 disp_b1_09 | ||
#define SPI3_PCS3 disp_b1_10 | ||
#define SPI4 0 | ||
#define SPI4_SCK disp_b2_12 | ||
#define SPI4_SDO disp_b2_14 | ||
#define SPI4_SDI disp_b2_13 | ||
#define SPI4_PCS0 disp_b2_15 | ||
#define SPI4_PCS1 sd_b2_04 | ||
#define SPI4_PCS2 sd_b2_05 | ||
#define SPI4_PCS3 sd_b2_06 | ||
#define SPI5 0 | ||
#define SPI5_SCK lpsr_02 | ||
#define SPI5_SDO lpsr_04 | ||
#define SPI5_SDI lpsr_05 | ||
#define SPI5_PCS0 lpsr_03 | ||
#define SPI5_PCS1 lpsr_06 | ||
#define SPI5_PCS2 lpsr_07 | ||
#define SPI5_PCS3 lpsr_08 | ||
#define SPI6 0 | ||
#define SPI6_SCK lpsr_10 | ||
#define SPI6_SDO lpsr_11 | ||
#define SPI6_SDI lpsr_12 | ||
#define SPI6_PCS0 lpsr_09 | ||
#define SPI6_PCS1 lpsr_08 | ||
#define SPI6_PCS2 lpsr_07 | ||
#define SPI6_PCS3 lpsr_06 | ||
*/ | ||
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#endif |
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#!/bin/bash | ||
# | ||
# Shell script for building armv7m7-imxrt117x-evkb project | ||
# | ||
# Copyright 2022 Phoenix Systems | ||
# Author: Lukasz Kosinski | ||
# | ||
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[ "${BASH_SOURCE[0]}" -ef "$0" ] && echo "You should source this script, not execute it!" && exit 1 | ||
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: "${WATCHDOG:=0}" | ||
export WATCHDOG | ||
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b_image_project () { | ||
b_log "The images have been built for the ${TARGET} platform" | ||
} |
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#define LWIP_TCPIP_CORE_LOCKING 1 | ||
#define LWIP_SUPPORT_CUSTOM_PBUF 1 | ||
#define LWIP_NETIF_LOOPBACK 1 | ||
#define LWIP_HAVE_SLIPIF 0 | ||
#define LWIP_NETIF_API 1 | ||
#define LWIP_SOCKET 1 | ||
#define LWIP_COMPAT_SOCKETS 0 | ||
#define LWIP_ARP 1 | ||
#define LWIP_ICMP 1 | ||
#define LWIP_RAW 1 | ||
#define LWIP_NETPACKET 1 | ||
#define LWIP_DHCP 1 | ||
#define LWIP_DNS 1 | ||
#define LWIP_AUTOIP 1 | ||
#define LWIP_UDP 1 | ||
#define LWIP_TCP 1 | ||
#define LWIP_TCP_KEEPALIVE 1 | ||
#define MEM_LIBC_MALLOC 1 | ||
#define MEMP_MEM_MALLOC 1 | ||
#define LWIP_ERRNO_INCLUDE "errno.h" | ||
#define LWIP_DNS_API_DEFINE_ERRORS 0 | ||
#define LWIP_DNS_API_DEFINE_FLAGS 0 | ||
#define LWIP_DNS_API_DECLARE_STRUCTS 0 | ||
#define LWIP_DNS_API_DECLARE_H_ERRNO 0 | ||
#define MEMP_NUM_NETCONN 1024 | ||
#define PPP_SUPPORT 1 | ||
#define PPPOS_SUPPORT 1 | ||
#define PAP_SUPPORT 1 | ||
#define CHAP_SUPPORT 1 | ||
#define MSCHAP_SUPPORT 0 | ||
#define LWIP_TIMEVAL_PRIVATE 0 | ||
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#if 0 // debugging LWiP PPPoS | ||
#define LWIP_DEBUG 1 | ||
#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL | ||
#define LWIP_DBG_TYPES_ON LWIP_DBG_ON | ||
#define PPP_DEBUG LWIP_DBG_ON | ||
#define HAVE_DRIVER_pppos 1 // register and start PPPoS driver | ||
#define HAVE_DRIVER_pppou 1 // register and start PPPoU driver | ||
#endif | ||
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#if 0 | ||
#define LWIP_DEBUG 1 | ||
#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL | ||
#define LWIP_DBG_TYPES_ON LWIP_DBG_ON | ||
#define PBUF_DEBUG LWIP_DBG_ON | ||
#define ETHARP_DEBUG LWIP_DBG_ON | ||
#define SOCKETS_DEBUG LWIP_DBG_ON | ||
#endif | ||
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#define TCP_MSS 1460 | ||
#define TCP_WND (32 * TCP_MSS) | ||
#define TCP_SND_BUF TCP_WND | ||
#define TCP_SND_QUEUELEN 192 | ||
#define ETH_PAD_SIZE 2 | ||
#define ETHARP_TABLE_MATCH_NETIF 1 | ||
#define IP_REASSEMBLY 1 | ||
#define IP_FRAG 1 | ||
#define SO_REUSE 1 | ||
#define DEFAULT_THREAD_STACKSIZE (4 * 4096) | ||
#define TCPIP_THREAD_STACKSIZE (4 * 4096) | ||
#define TCPIP_THREAD_PRIO 3 | ||
#define TCPIP_MBOX_SIZE 256 | ||
#define DEFAULT_RAW_RECVMBOX_SIZE 32 | ||
#define DEFAULT_UDP_RECVMBOX_SIZE 32 | ||
#define DEFAULT_TCP_RECVMBOX_SIZE 32 | ||
#define DEFAULT_ACCEPTMBOX_SIZE 32 | ||
#define LWIP_HOOK_FILENAME "phoenix-hooks.h" | ||
#define LWIP_EXT_PF 1 | ||
#define LWIP_NETIF_STATUS_CALLBACK 1 | ||
#define LWIP_DHCP_AUTOIP_COOP 1 | ||
#define LWIP_DHCP_AUTOIP_COOP_TRIES 3 | ||
#define LWIP_SO_RCVTIMEO 1 | ||
#define LWIP_SO_SNDTIMEO 1 | ||
#define ifreq lwip_ifreq | ||
#define LWIP_NETIF_LINK_CALLBACK 1 | ||
#define LWIP_DHCP_GET_MOBILE_AGENT 1 | ||
#define LWIP_EXT_IPSEC 1 | ||
#define LWIP_LINKMONITOR_DEV 1 | ||
#define LWIP_IFSTATUS_DEV_BUFFER_SIZE 1024 | ||
#define LWIP_IFSTATUS_DEV 1 | ||
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/* required by Wi-Fi driver */ | ||
#define PBUF_LINK_HLEN 44 | ||
#define LWIP_NETIF_REMOVE_CALLBACK 1 | ||
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/* stats */ | ||
#define LWIP_STATS 1 | ||
#define LWIP_STATS_DISPLAY 1 | ||
#define LINK_STATS 1 | ||
#define IP_STATS 1 | ||
#define ICMP_STATS 1 | ||
#define IGMP_STATS 1 | ||
#define IPFRAG_STATS 1 | ||
#define UDP_STATS 1 | ||
#define TCP_STATS 1 | ||
#define MEM_STATS 1 | ||
#define MEMP_STATS 1 | ||
#define PBUF_STATS 1 | ||
#define SYS_STATS 1 |
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