Decoder improvements #172
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Decoder improvements #172
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greatroar
commented
Feb 18, 2022
greatroar
commented
- Handles a corner case in the decoders that wasn't previously detected, where the last token declared a match but input stopped right where the match offset would be.
- amd64 decoder now checks for zero offsets in its shortcut code, making it consistent with the other decoders.
- arm64 decoder has been made a few instructions shorter and it can use its fast match copy loop even after copying from a dictionary, just like the other decoders.
Use fast loop after dict copy. Checking for its possibility costs as many instructions as jumping over it. Move SUBS close to conditional branches for CPUs that fuse these instructions. Shave one instruction off the remainder handling code after this loop. A load from register base+register offset has the same latency and throughput as a load from register+constant offset, at least on Cortex-A72.
This corner case wasn't detected by any of the decoders.
The other decoders handle this correctly.
|
I suppose the test failures are the ones on v4; locally, all tests pass with this branch. |
pierrec
added a commit
that referenced
this pull request
May 17, 2022
cherrypick (#172): internal/lz4block: arm64 decoder improvements
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