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tikv: pre-index stores in region-cache for different access pattern #18040

Merged
merged 9 commits into from
Jun 18, 2020
Merged

tikv: pre-index stores in region-cache for different access pattern #18040

merged 9 commits into from
Jun 18, 2020

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lysu
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@lysu lysu commented Jun 16, 2020 •
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What problem does this PR solve?

Issue Number: close #17930

Problem Summary:

  • there are many possibilities to retry wrong store type
  • we should have more access pattern in future, filter labels at access time are inefficient

What is changed and how it works?

What's Changed， How it Works:

  • add accessIndex field to save idx in regionStore.Stores, and set index in RPCCtx be index of accessIndex
  • choose any tikv store peer as leader when tiflash return EpochNotMatch

Related changes

  • Need to cherry-pick to the release branch 4.0

Check List

Tests

  • Unit test
  • Integration test

Side effects

  • n/a

Release note

  • Pre-index stores in region-cache for different access pattern

This change is Reviewable

@lysu lysu added type/enhancement The issue or PR belongs to an enhancement. type/bugfix This PR fixes a bug. component/tikv labels Jun 16, 2020
@lysu lysu mentioned this pull request Jun 16, 2020
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@lysu lysu added the require-LGT3 Indicates that the PR requires three LGTM. label Jun 16, 2020
@github-actions github-actions bot added the sig/execution SIG execution label Jun 16, 2020
coocood
coocood reviewed Jun 16, 2020
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store/tikv/region_cache.go Outdated Show resolved Hide resolved
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lysu commented Jun 16, 2020

/run-all-tests

coocood
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store/tikv/region_cache.go Outdated Show resolved Hide resolved
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store/tikv/region_cache.go
@@ -381,10 +435,10 @@ func (c *RegionCache) GetTiFlashRPCContext(bo *Backoffer, id RegionVerID) (*RPCC

// sIdx is for load balance of TiFlash store.
sIdx := int(atomic.AddInt32(&regionStore.workTiFlashIdx, 1))
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Is it possible that the workTiFlashIdx increased to the length of the array, and is used to access the slice, then panic with slice out of bound error?

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@lysu lysu Jun 16, 2020 •
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workTiFlashIdx will continue increasing, but it always mod TiFlash store count

accessIdx := (sIdx + i) % regionStore.accessStoreNum(TiFlashOnly)

before access AccessIndex array

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codecov bot commented Jun 16, 2020 •
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Codecov Report

Merging #18040 into master will increase coverage by 0.0149%.
The diff coverage is 84.8684%.

@@               Coverage Diff                @@
##             master     #18040        +/-   ##
================================================
+ Coverage   79.4486%   79.4636%   +0.0149%     
================================================
  Files           525        525                
  Lines        142375     142396        +21     
================================================
+ Hits         113115     113153        +38     
+ Misses        20106      20079        -27     
- Partials       9154       9164        +10

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lysu commented Jun 16, 2020

/run-all-tests

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lysu commented Jun 16, 2020

/run-all-tests

@lysu lysu requested a review from coocood June 16, 2020 12:17
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coocood commented Jun 16, 2020

LGTM

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coocood commented Jun 16, 2020

@jackysp PTAL

@lysu lysu requested review from lzmhhh123 and jackysp June 16, 2020 14:16
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lysu commented Jun 17, 2020

/run-all-tests

@coocood coocood requested a review from a team as a code owner June 17, 2020 14:01
@coocood coocood requested review from SunRunAway and removed request for a team June 17, 2020 14:01
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coocood commented Jun 17, 2020

/run-common-test

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LGTM

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jackysp commented Jun 17, 2020

/merge

@ti-srebot ti-srebot added the status/can-merge Indicates a PR has been approved by a committer. label Jun 17, 2020
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/run-all-tests

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jackysp commented Jun 17, 2020

/rebuild

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@lysu merge failed.

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coocood commented Jun 18, 2020

/run-all-tests

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coocood commented Jun 18, 2020

again, failed on

[2020-06-18T02:16:01.056Z] FAIL: region_cache_test.go:240: testRegionCacheSuite.TestUpdateLeader3
[2020-06-18T02:16:01.056Z] 
[2020-06-18T02:16:01.056Z] region_cache_test.go:278:
[2020-06-18T02:16:01.056Z]     c.Assert(addr, Not(Equals), addr2)
[2020-06-18T02:16:01.056Z] ... obtained string = "store1"
[2020-06-18T02:16:01.056Z] ... expected string = "store1"
[2020-06-18T02:16:01.056Z]

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lysu commented Jun 18, 2020

/run-all-tests

@coocood coocood merged commit ad68349 into pingcap:master Jun 18, 2020
@ti-srebot ti-srebot mentioned this pull request Jun 18, 2020
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ti-srebot pushed a commit to ti-srebot/tidb that referenced this pull request Jun 18, 2020
@lysu @ti-srebot
cherry pick pingcap#18040 to release-4.0
3a8622c 
Signed-off-by: ti-srebot <ti-srebot@pingcap.com>
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cherry pick to release-4.0 in PR #18105

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lysu commented Jun 18, 2020

/run-cherry-picker

lysu pushed a commit that referenced this pull request Jun 18, 2020
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tikv: pre-index stores in region-cache for different access pattern (#…
0082d04 
…18040)
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@coocood coocood coocood approved these changes

@jackysp jackysp jackysp left review comments

@lzmhhh123 lzmhhh123 Awaiting requested review from lzmhhh123

@SunRunAway SunRunAway Awaiting requested review from SunRunAway

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Successfully merging this pull request may close these issues.

tiflash epochNotMatch make tiflash as region leader forever
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