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planner: make group expression inherit logical plan & refine rule interface. #57782

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merged 13 commits into from
Dec 3, 2024

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AilinKid
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What problem does this PR solve?

Issue Number: ref #51664

Problem Summary:

What changed and how does it work?

Check List

Tests

  • Unit test
  • Integration test
  • Manual test (add detailed scripts or steps below)
  • No need to test
    • I checked and no code files have been changed.

Side effects

  • Performance regression: Consumes more CPU
  • Performance regression: Consumes more Memory
  • Breaking backward compatibility

Documentation

  • Affects user behaviors
  • Contains syntax changes
  • Contains variable changes
  • Contains experimental features
  • Changes MySQL compatibility

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Please refer to Release Notes Language Style Guide to write a quality release note.

None

@ti-chi-bot ti-chi-bot bot added release-note-none Denotes a PR that doesn't merit a release note. sig/planner SIG: Planner size/XL Denotes a PR that changes 500-999 lines, ignoring generated files. labels Nov 28, 2024
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Hi @AilinKid. Thanks for your PR.

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codecov bot commented Nov 28, 2024

Codecov Report

Attention: Patch coverage is 71.18644% with 17 lines in your changes missing coverage. Please review.

Project coverage is 73.5329%. Comparing base (cb408e0) to head (f3ac15c).
Report is 4 commits behind head on master.

Additional details and impacted files
@@               Coverage Diff                @@
##             master     #57782        +/-   ##
================================================
+ Coverage   73.1382%   73.5329%   +0.3946%     
================================================
  Files          1670       1671         +1     
  Lines        460581     461849      +1268     
================================================
+ Hits         336861     339611      +2750     
+ Misses       103003     101521      -1482     
  Partials      20717      20717                
Flag Coverage Δ
integration 43.4312% <ø> (?)
unit 72.2736% <71.1864%> (+0.0016%) ⬆️

Flags with carried forward coverage won't be shown. Click here to find out more.

Components Coverage Δ
dumpling 52.7673% <ø> (ø)
parser ∅ <ø> (∅)
br 45.5344% <ø> (-0.4919%) ⬇️

@hawkingrei hawkingrei self-requested a review November 29, 2024 03:38
pkg/planner/cascades/memo/group.go Outdated Show resolved Hide resolved
pkg/planner/cascades/memo/group.go Outdated Show resolved Hide resolved
@@ -159,15 +153,15 @@ func NewBinder(p *pattern.Pattern, gE *memo.GroupExpression) *Binder {
// empty stack info, means the toppest loop.
// pre-set nil is for later alignment with the traceID indexing.
stackInfo: []*list.Element{},
holder: &GroupExprHolder{Cur: gE},
holder: gE,
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Should we directly keep the Logicalplan as the holder in here ?

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@AilinKid AilinKid Nov 29, 2024

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not possible, some unchanged holder should be able to be traced back to its original group when copying in, LogicalPlan couldn't do that

base2 "github.com/pingcap/tidb/pkg/planner/cascades/base"
"github.com/pingcap/tidb/pkg/planner/cascades/util"
"github.com/pingcap/tidb/pkg/planner/core/base"
"github.com/pingcap/tidb/pkg/planner/pattern"
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Maybe we need to organize the old cascades struct into new one

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@AilinKid AilinKid Nov 29, 2024

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yes, we did, currently all old stuff have been moved from ./cascades into ./cascades/old pkg, cause we want to use cascades pkg

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image

}

// WriteString implements IBufStrWriter
func (sw *StrBuffer) WriteString(s string) {
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Why do we need an extra package for strBufferWriter ? Just for add a assert in the test ?

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yes, it's for simplicity. otherwise, we should add hint skipper like the below

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image

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LGTM

@ti-chi-bot ti-chi-bot bot added approved needs-1-more-lgtm Indicates a PR needs 1 more LGTM. labels Dec 2, 2024
Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
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Signed-off-by: arenatlx <314806019@qq.com>
Signed-off-by: arenatlx <314806019@qq.com>
@AilinKid AilinKid force-pushed the ge-inherit-logical-plan branch from 4d96d1b to f3ac15c Compare December 3, 2024 03:46
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ti-chi-bot bot commented Dec 3, 2024

[APPROVALNOTIFIER] This PR is APPROVED

This pull-request has been approved by: elsa0520, hawkingrei

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@ti-chi-bot ti-chi-bot bot added the lgtm label Dec 3, 2024
@ti-chi-bot ti-chi-bot bot removed the needs-1-more-lgtm Indicates a PR needs 1 more LGTM. label Dec 3, 2024
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ti-chi-bot bot commented Dec 3, 2024

[LGTM Timeline notifier]

Timeline:

  • 2024-12-02 06:02:33.160689602 +0000 UTC m=+1048340.780344118: ☑️ agreed by elsa0520.
  • 2024-12-03 06:02:33.693058809 +0000 UTC m=+1134741.312713324: ☑️ agreed by hawkingrei.

@ti-chi-bot ti-chi-bot bot merged commit 66661bd into pingcap:master Dec 3, 2024
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3 participants